Bochs and IOAPIC
Posted: Thu Mar 06, 2008 12:15 pm
Hi
I am trying to set up Bochs SMP to route IRQ provided via PIC through IOAPIC virtual wire as follows:
Setup IOAPIC pin0 to ExtINT phys delivery interrupt to CPU0
Mask LAPIC on CPU0 LVT0 register to disconnect PIC from LAPIC
From now IRQ must be routed from 8259 PIC to IOAPIC and then to CPU, so I can dynamically change CPU that receives IRQ.
I know, it's a bit strange configuration, but it works on real machines and doesn't work on Bochs. I've looked through the bochs code and found that masking LAPIC LVT registers doesnt do anything and i got two interrupts at the same time. So you cannot "disconnect" PIC from CPU to route it through IOAPIC -- it is hardwired.
Can anyone confirm this?
I am trying to set up Bochs SMP to route IRQ provided via PIC through IOAPIC virtual wire as follows:
Setup IOAPIC pin0 to ExtINT phys delivery interrupt to CPU0
Mask LAPIC on CPU0 LVT0 register to disconnect PIC from LAPIC
From now IRQ must be routed from 8259 PIC to IOAPIC and then to CPU, so I can dynamically change CPU that receives IRQ.
I know, it's a bit strange configuration, but it works on real machines and doesn't work on Bochs. I've looked through the bochs code and found that masking LAPIC LVT registers doesnt do anything and i got two interrupts at the same time. So you cannot "disconnect" PIC from CPU to route it through IOAPIC -- it is hardwired.
Can anyone confirm this?