Bochs and IOAPIC

Question about which tools to use, bugs, the best way to implement a function, etc should go here. Don't forget to see if your question is answered in the wiki first! When in doubt post here.
Post Reply
alkot
Posts: 13
Joined: Tue Nov 06, 2007 5:10 am

Bochs and IOAPIC

Post by alkot »

Hi

I am trying to set up Bochs SMP to route IRQ provided via PIC through IOAPIC virtual wire as follows:

Setup IOAPIC pin0 to ExtINT phys delivery interrupt to CPU0
Mask LAPIC on CPU0 LVT0 register to disconnect PIC from LAPIC
From now IRQ must be routed from 8259 PIC to IOAPIC and then to CPU, so I can dynamically change CPU that receives IRQ.
I know, it's a bit strange configuration, but it works on real machines and doesn't work on Bochs. I've looked through the bochs code and found that masking LAPIC LVT registers doesnt do anything and i got two interrupts at the same time. So you cannot "disconnect" PIC from CPU to route it through IOAPIC -- it is hardwired.

Can anyone confirm this?
User avatar
zaleschiemilgabriel
Member
Member
Posts: 232
Joined: Mon Feb 04, 2008 3:58 am

Post by zaleschiemilgabriel »

IIRC once you go to Symmetric Mode you don't need the standard PIC any more...
Also, CPU0 as you described above should be the bootstrap processor. You should read the MP configuration and use the data found there.

Finally, you should never assume that Virtual Wire Mode is supported. Again, you need to check the MP configuration tables to find out.
Bit 7 of MP feature information byte 2, the IMCR present bit, is used by the operating system to determine whether PIC Mode or Virtual Wire Mode is implemented by the system.
DeviOuS - what a stupid name
alkot
Posts: 13
Joined: Tue Nov 06, 2007 5:10 am

Post by alkot »

zaleschiemilgabriel, thanks for your answer,

Of cource I read MP tables and ACPI ones on newer systems.
Bochs shows in his MP tables that it implements Virtual Wire mode.

The question is not how it works (it's a bit strange system), the question is why that doesn't work in bochs. Most of the code I debug in Bochs.
The same code works well in Vmware.

Thanks
User avatar
Brendan
Member
Member
Posts: 8561
Joined: Sat Jan 15, 2005 12:00 am
Location: At his keyboard!
Contact:

Post by Brendan »

Hi,
alkot wrote:The question is not how it works (it's a bit strange system), the question is why that doesn't work in bochs. Most of the code I debug in Bochs.
The same code works well in Vmware.
While your code *should* work (AFAIK), it's an obscure way to do things - it's likely that no other OS has attempted to configure IRQs like this, and therefore unlikely that Bochs has been tested with IRQs configured this way.

Therefore you've got 3 choices:
  • 1) change your OS so it configures IRQ in a more common way (e.g. don't use the "legacy" PIC if you're using the I/O APIC).
    2) find the problem and submit a patch for Bochs
    3) complain to the Bochs project developers and hope they fix it
Because it is an obscure way to do things, it's possible that you'll also have problems on real hardware - even though the code should work in theory, motherboard manufacturers may have never tested it on any of their motherboards, so in practice it might be unreliable. Note: sometimes it seems like some motherboard manufacturers (especially those that make "budget" motherboards) don't care about anything except Windows.

Taking it all into consideration, I'd be tempted to try the first option - e.g. use "Symmetric Mode" instead of trying to make a dead dog bark (umm, instead of trying to make legacy hardware do things it was never designed to do).

As a bonus, if you do decide to use "Symmetric Mode" you'll also fix the IRQ sharing problem with the PICs. For example, the computer I'm typing this on has a pair of PCI host controllers and 8 PCI IRQ lines (4 per controller), plus 15 ISA IRQ lines, plus the SCI IRQ. It also has a pair of I/O APICs (with 16 inputs each) so that all 24 IRQs don't need to be squeezed into 15 PIC inputs.

In addition, you'll be able to dynamically change which CPU each IRQ is sent to (rather than being able to change which CPU all IRQs are sent to), and you'll be able to take advantage of "send to lowest priority" delivery mode, and a few other things.

I guess what I'm saying is that what you're doing should work in theory, but possibly won't work in practice, but there's a better way to do things anyway.... ;)


Cheers,

Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
User avatar
zaleschiemilgabriel
Member
Member
Posts: 232
Joined: Mon Feb 04, 2008 3:58 am

Post by zaleschiemilgabriel »

I don't think what he is trying to do is supposed to work, Brendan. The Intel specs say that only the BIOS and/or the hardware should initialize Virtual Wire mode. The part where it describes what the OS should do doesn't include initializing any mode other than Symmetric Mode, or maybe I just haven't got to that part yet... :P
That said, whatever method Bochs uses to set Virtual Wire should probably be considered to be complying.
DeviOuS - what a stupid name
Post Reply