Hi,
Just thought I'd post a few things from the floppy controller datasheet, just in case you've missed something....
I'm using the "82077AA CHMOS SINGLE-CHIP FLOPPY DISK CONTROLLER" datasheet, but they are all (mostly) identical so this shouldn't matter.
After reset the FDC is in polling mode and will not generate any IRQs:
"On exiting the reset state, various internal registers are cleared, and the 82077AA waits for a new command. Drive polling will start unless disabled by a new CONFIGURE command."
This means to get interrupts working you must send a "configure" command first. As part of the configure command there's a set of flags - one is called "POLL" which must be set to disable polling (or enable the IRQ).
Then the hardware will reset itself and the devices, and each device will set it's internal interrupt pin, which is where it gets a little tricky.
Because the FDC is in polling mode after reset, these internal interrupt pins will not cause any IRQ. Because of this you need to send four seperate "Sense Interrupt" commands to clear each of the 4 internal interrupt pins (ie. once for each device the FDC can support).
However, if you can turn polling mode off quickly enough after reset then these "Sense Interrupt" commands aren't necessary:
"As a note, if the CONFIGURE command is issued within 250 ms of the trailing edge of reset (@ 1 Mbps), the polling mode of the 82077AA can be disabled before the polling initiated interrupt occurs. Since polling stops when the 82077AA enters the command phase, it is only time critical up to the first byte of the CONFIGURE command. If disabled in time, the system software no longer needs to issue the four SENSE INTERRUPT STATUS commands to clear the internal interrupt flags normally caused by polling."
Please note the amount of time stated - "250 ms of the trailing edge of reset (@ 1 Mbps)". This means that if you've set the data rate (via. the CCR IO port, which is normally done immediately after the reset) to 500 Kbps (which is normal for 1440 KB and 1200 KB floppy drives) then you'd actually have 500 mS to send the first byte of the "Configure" command (or at 250 Kbps you'd have an entire second, but lower density floppies are completely obsolete).
Most datasheets recommend setting the data rate via. the CCR IO port (Configuration Control Register) immediately after the reset (and before sending any commands). It's also possible to leave this until after you've sent the "Configure" command because the data rate is set to a default 250 Kbps during reset. This would give you extra time before the "Configure" command must be sent (in case you're worried about not getting it sent in time to avoid the "sense interrupt" stuff).
Also, the reset causes most of the other timing information to be lost, so you must send a "specify" command:
"Parameters set by the SPECIFY command are undefined after a system reset and will need to be reinitialized."
Combining all of this gives 3 initialization algorithms.
Algorithm A:
- Reset the FDC
Program the data rate via. the CCR
Issue the "send interrupt status" command 4 times
Issue the "configure" command
Issue the "specify" command
--Floppy Controller Ready--
Algorithm B:
- Reset the FDC
Program the data rate via. the CCR
Issue the "configure" command (must be within 250 mS, depending on data rate)
Issue the "specify" command
--Floppy Controller Ready--
Algorithm C:
- Reset the FDC
Issue the "configure" command (must be within 1 second)
Issue the "specify" command and program the data rate via. the CCR
--Floppy Controller Ready--
Cheers,
Brendan