FDC driver irq fires
FDC driver irq fires
I want to make a floppy driver and have read some tutorials. I've started coding the driver. But there's one thing i don't understand. That is how I manage to get the irq fire. I've setup a irq handler at irq 6 but I don't know how programm the irq so it does fire.
Can anyone give me a hint ?
Can anyone give me a hint ?
Re:FDC driver irq fires
You don't tell the floppy irq to fire, you send it a command (like seek) with applicable data, and then your interrupt routine will be called when the operation is complete. I assume you've got the floppy to reset at least? That fires an interrupt
Re:FDC driver irq fires
Yes i've written a fdc_send and a fdc_reset function. but the irq doesn't fire. You kan see the code below..
The irq handler is setup at 0x38...
Code: Select all
#include "etc..."
volatile int fd_flag = 0;
void fdc_send(int byte)
{
volatile int msr;
int tmo;
puts("SEND BYTE\n");
for (tmo = 0;tmo < 128;tmo++) {
msr = inportb(0x3f4);
if ((msr & 0xc0) == 0x80) {
outportb(0x3f5,byte);
return;
}
inportb(0x80);
}
}
void fdc_reset()
{
puts("RESET\n");
outportb(0x3f7, 0x00);
fdc_send(0x03);
fdc_send(0xDF);
fdc_send(0x01);
fd_flag = 0;
while(fd_flag == 0);
puts("RESET DONE!\n");
}
void fdc_handler()
{
fd_flag = 1;
puts("FDC!");
}
Assembler part of the irq handler..
-------------------------------------------------
; 38: IRQ6
irq6:
pusha
call fdc_handler
mov al, 0x20
out 0x20, al
popa
iret
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Re:FDC driver irq fires
make sure you have enabled that IRQ line on the PIC, too, and that the DOR will let the FDC send you the IRQ signal.
And, according to the datasheet:
And, according to the datasheet:
5.2 Control Commands
Control commands differ from the other commands in that no data transfer takes place. Three commands generate an interrupt when complete; READ ID, RECALIBRATE and SEEK. The other control commands do not generate an interrupt. (p30)
POLL - Disable polling of the drives. Defaults to ``0'', polling enabled. When enabled, a single interrupt is generated after a RESET. No polling is performed while the drive head is loaded and the head unload delay has not expired. (p32)
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Re:FDC driver irq fires
You may also want to check the "initialization sequence" of intel's datasheet. It looks that before issueing the "specify" command, you're supposed to wait for the interrupt
According to Mike in http://www.osdev.org/osfaq2/index.php/FloppyDriver, you should rather have
According to Mike in http://www.osdev.org/osfaq2/index.php/FloppyDriver, you should rather have
Code: Select all
outportb(DOR,0); // do the reset
sleep(some_milliseconds);
outportb(DOR,4); // release the reset
wait_until_interrupt_received();
Re:FDC driver irq fires
Hi again...
Now I've got the irq fire but only once... I fires when i use Pype's reset code... But when i turn the motor on or seek or something else the irq doesn't fire...
Now I've got the irq fire but only once... I fires when i use Pype's reset code... But when i turn the motor on or seek or something else the irq doesn't fire...
Re:FDC driver irq fires
Did the other IRQs also stop (the timer or keyboard, for ex.)?
If so, I suspect you forgot the EOI, to tell the PIC that you are ready for the next IRQ.
cheers Joe
If so, I suspect you forgot the EOI, to tell the PIC that you are ready for the next IRQ.
Code: Select all
outportb(0x20, 0x20)
Re:FDC driver irq fires
I've a EOI in my irq stub
Yes the other interrupts does also stops (they did last time i checked)... Tried also to add the outportb(0x20,0x20); but of course i didn't help..
Code: Select all
mov al, 0x20
out 0x20, al
Re:FDC driver irq fires
Now that's strange. When you do the EOI before returning from the interrupt, but all the IRQs are still halted, it looks more like a problem with your interrupt code than the floppy driver.
cheers Joe
cheers Joe
Re:FDC driver irq fires
Yes it's strange... Both my timer and keyboard handler works, so im a bit lost... But i'll try to figure out something...
Re:FDC driver irq fires
On two of our computers is the irq called once.. on the third is it nerver called.. and in qemu is it also never called...
Re:FDC driver irq fires
Hi,
Just thought I'd post a few things from the floppy controller datasheet, just in case you've missed something....
I'm using the "82077AA CHMOS SINGLE-CHIP FLOPPY DISK CONTROLLER" datasheet, but they are all (mostly) identical so this shouldn't matter.
After reset the FDC is in polling mode and will not generate any IRQs:
"On exiting the reset state, various internal registers are cleared, and the 82077AA waits for a new command. Drive polling will start unless disabled by a new CONFIGURE command."
This means to get interrupts working you must send a "configure" command first. As part of the configure command there's a set of flags - one is called "POLL" which must be set to disable polling (or enable the IRQ).
Then the hardware will reset itself and the devices, and each device will set it's internal interrupt pin, which is where it gets a little tricky.
Because the FDC is in polling mode after reset, these internal interrupt pins will not cause any IRQ. Because of this you need to send four seperate "Sense Interrupt" commands to clear each of the 4 internal interrupt pins (ie. once for each device the FDC can support).
However, if you can turn polling mode off quickly enough after reset then these "Sense Interrupt" commands aren't necessary:
"As a note, if the CONFIGURE command is issued within 250 ms of the trailing edge of reset (@ 1 Mbps), the polling mode of the 82077AA can be disabled before the polling initiated interrupt occurs. Since polling stops when the 82077AA enters the command phase, it is only time critical up to the first byte of the CONFIGURE command. If disabled in time, the system software no longer needs to issue the four SENSE INTERRUPT STATUS commands to clear the internal interrupt flags normally caused by polling."
Please note the amount of time stated - "250 ms of the trailing edge of reset (@ 1 Mbps)". This means that if you've set the data rate (via. the CCR IO port, which is normally done immediately after the reset) to 500 Kbps (which is normal for 1440 KB and 1200 KB floppy drives) then you'd actually have 500 mS to send the first byte of the "Configure" command (or at 250 Kbps you'd have an entire second, but lower density floppies are completely obsolete).
Most datasheets recommend setting the data rate via. the CCR IO port (Configuration Control Register) immediately after the reset (and before sending any commands). It's also possible to leave this until after you've sent the "Configure" command because the data rate is set to a default 250 Kbps during reset. This would give you extra time before the "Configure" command must be sent (in case you're worried about not getting it sent in time to avoid the "sense interrupt" stuff).
Also, the reset causes most of the other timing information to be lost, so you must send a "specify" command:
"Parameters set by the SPECIFY command are undefined after a system reset and will need to be reinitialized."
Combining all of this gives 3 initialization algorithms.
Algorithm A:
Cheers,
Brendan
Just thought I'd post a few things from the floppy controller datasheet, just in case you've missed something....
I'm using the "82077AA CHMOS SINGLE-CHIP FLOPPY DISK CONTROLLER" datasheet, but they are all (mostly) identical so this shouldn't matter.
After reset the FDC is in polling mode and will not generate any IRQs:
"On exiting the reset state, various internal registers are cleared, and the 82077AA waits for a new command. Drive polling will start unless disabled by a new CONFIGURE command."
This means to get interrupts working you must send a "configure" command first. As part of the configure command there's a set of flags - one is called "POLL" which must be set to disable polling (or enable the IRQ).
Then the hardware will reset itself and the devices, and each device will set it's internal interrupt pin, which is where it gets a little tricky.
Because the FDC is in polling mode after reset, these internal interrupt pins will not cause any IRQ. Because of this you need to send four seperate "Sense Interrupt" commands to clear each of the 4 internal interrupt pins (ie. once for each device the FDC can support).
However, if you can turn polling mode off quickly enough after reset then these "Sense Interrupt" commands aren't necessary:
"As a note, if the CONFIGURE command is issued within 250 ms of the trailing edge of reset (@ 1 Mbps), the polling mode of the 82077AA can be disabled before the polling initiated interrupt occurs. Since polling stops when the 82077AA enters the command phase, it is only time critical up to the first byte of the CONFIGURE command. If disabled in time, the system software no longer needs to issue the four SENSE INTERRUPT STATUS commands to clear the internal interrupt flags normally caused by polling."
Please note the amount of time stated - "250 ms of the trailing edge of reset (@ 1 Mbps)". This means that if you've set the data rate (via. the CCR IO port, which is normally done immediately after the reset) to 500 Kbps (which is normal for 1440 KB and 1200 KB floppy drives) then you'd actually have 500 mS to send the first byte of the "Configure" command (or at 250 Kbps you'd have an entire second, but lower density floppies are completely obsolete).
Most datasheets recommend setting the data rate via. the CCR IO port (Configuration Control Register) immediately after the reset (and before sending any commands). It's also possible to leave this until after you've sent the "Configure" command because the data rate is set to a default 250 Kbps during reset. This would give you extra time before the "Configure" command must be sent (in case you're worried about not getting it sent in time to avoid the "sense interrupt" stuff).
Also, the reset causes most of the other timing information to be lost, so you must send a "specify" command:
"Parameters set by the SPECIFY command are undefined after a system reset and will need to be reinitialized."
Combining all of this gives 3 initialization algorithms.
Algorithm A:
- Reset the FDC
Program the data rate via. the CCR
Issue the "send interrupt status" command 4 times
Issue the "configure" command
Issue the "specify" command
--Floppy Controller Ready--
- Reset the FDC
Program the data rate via. the CCR
Issue the "configure" command (must be within 250 mS, depending on data rate)
Issue the "specify" command
--Floppy Controller Ready--
- Reset the FDC
Issue the "configure" command (must be within 1 second)
Issue the "specify" command and program the data rate via. the CCR
--Floppy Controller Ready--
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
Re:FDC driver irq fires
Code: Select all
Assembler part of the irq handler..
-------------------------------------------------
; 38: IRQ6
irq6:
pusha
call fdc_handler
mov al, 0x20
out 0x20, al
popa
iret
Code: Select all
call fdc_handler
Code: Select all
call _fdc_handler
Re:FDC driver irq fires
The leading underscore depends on the executable format (IIRC COFF/PE - default from MSVC++/MinGW/DJGPP - will always use leading underscores) and whether or not -fno-leading-underscores was used in the command line.Tora OS wrote:Correct me if im wrong put i thought a reference to a C function had to have a _ infront of it. So instead of:it would be:Code: Select all
call fdc_handler
Code: Select all
call _fdc_handler
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Re:FDC driver irq fires
Are you properly sending a "sense interrupt" command to the controller after the IRQ is received ? this is the only way you can tell the floppy controller "okay, i got your interrupt request and i'm taking good care of it. If you have further stuff to tell me about, just send me another IRQ, right ?"Zioo wrote: Hi again...
Now I've got the irq fire but only once... I fires when i use Pype's reset code... But when i turn the motor on or seek or something else the irq doesn't fire...