Issuing READ_DMA_EXT doesn't work even though IDENTIFY_DEVICE works on SATA drive
Posted: Thu Apr 30, 2026 2:35 pm
So I have been trying to read data from a virtual SATA drive through sending commands but although I receive D2H FIS, the buffer is empty. The specification specifies that if the data transfer is done there is a D2H FIS. I receive PIO setup FIS and D2H FIS when sending IDENTIFY_DEVICE and it works fine as far as I can tell. Here is what I try to do:
Construct the command header
Construct the physical region descriptor table
Set the related command issue bit
And read the data.
I know that waiting is important on real devices but since I am on QEMU and I don't want to clutter the log I didn't wait by polling some specific bits. Here is the QEMU log:
EDIT: I forgot the put the code, how silly of me
https://github.com/yucarp/cutesugaros/b ... les/ahci.c
Construct the command header
Construct the physical region descriptor table
Set the related command issue bit
And read the data.
I know that waiting is important on real devices but since I am on QEMU and I don't want to clutter the log I didn't wait by polling some specific bits. Here is the QEMU log:
EDIT: I forgot the put the code, how silly of me
Code: Select all
ahci_start_dma ahci(0x55f33ed0b5b0)[2]: start dma
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000000
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000000
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000000
ahci_populate_sglist ahci(0x55f33ed0b5b0)[2]
ahci_dma_rw_buf ahci(0x55f33ed0b5b0)[2] len=0x8000
ahci_cmd_done ahci(0x55f33ed0b5b0)[2]: cmd done
ahci_trigger_irq ahci(0x55f33ed0b5b0)[2]: trigger irq +DHRS (0x00000001); irqstat: 0x00000000 --> 0x00000001; effective: 0x00000000
ahci_check_irq ahci(0x55f33ed0b5b0): check irq 0x00000000 --> 0x00000000
ahci_irq_lower ahci(0x55f33ed0b5b0): lower irq
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000001
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000001
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000001
ahci_mem_write ahci(0x55f33ed0b5b0): write4 @ 0x210: 0x0000000000000001
ahci_port_write ahci(0x55f33ed0b5b0)[2]: port write [reg:PxIS] @ 0x10: 0x00000001
ahci_check_irq ahci(0x55f33ed0b5b0): check irq 0x00000000 --> 0x00000000
ahci_irq_lower ahci(0x55f33ed0b5b0): lower irq
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000000
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000000
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000000
ahci_mem_write ahci(0x55f33ed0b5b0): write4 @ 0x238: 0x0000000000000001
ahci_port_write ahci(0x55f33ed0b5b0)[2]: port write [reg:PxCI] @ 0x38: 0x00000001
ahci_start_dma ahci(0x55f33ed0b5b0)[2]: start dma
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000000
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000000
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000000
ahci_populate_sglist ahci(0x55f33ed0b5b0)[2]
ahci_dma_rw_buf ahci(0x55f33ed0b5b0)[2] len=0x8000
ahci_cmd_done ahci(0x55f33ed0b5b0)[2]: cmd done
ahci_trigger_irq ahci(0x55f33ed0b5b0)[2]: trigger irq +DHRS (0x00000001); irqstat: 0x00000000 --> 0x00000001; effective: 0x00000000
ahci_check_irq ahci(0x55f33ed0b5b0): check irq 0x00000000 --> 0x00000000
ahci_irq_lower ahci(0x55f33ed0b5b0): lower irq
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000001
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000001
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000001
ahci_mem_write ahci(0x55f33ed0b5b0): write4 @ 0x210: 0x0000000000000001
ahci_port_write ahci(0x55f33ed0b5b0)[2]: port write [reg:PxIS] @ 0x10: 0x00000001
ahci_check_irq ahci(0x55f33ed0b5b0): check irq 0x00000000 --> 0x00000000
ahci_irq_lower ahci(0x55f33ed0b5b0): lower irq
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000000
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000000
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000000
ahci_mem_write ahci(0x55f33ed0b5b0): write4 @ 0x238: 0x0000000000000001
ahci_port_write ahci(0x55f33ed0b5b0)[2]: port write [reg:PxCI] @ 0x38: 0x00000001
ahci_start_dma ahci(0x55f33ed0b5b0)[2]: start dma
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000000
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000000
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000000
ahci_populate_sglist ahci(0x55f33ed0b5b0)[2]
ahci_dma_rw_buf ahci(0x55f33ed0b5b0)[2] len=0x8000
ahci_cmd_done ahci(0x55f33ed0b5b0)[2]: cmd done
ahci_trigger_irq ahci(0x55f33ed0b5b0)[2]: trigger irq +DHRS (0x00000001); irqstat: 0x00000000 --> 0x00000001; effective: 0x00000000
ahci_check_irq ahci(0x55f33ed0b5b0): check irq 0x00000000 --> 0x00000000
ahci_irq_lower ahci(0x55f33ed0b5b0): lower irq
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000001
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000001
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000001
ahci_mem_write ahci(0x55f33ed0b5b0): write4 @ 0x210: 0x0000000000000001
ahci_port_write ahci(0x55f33ed0b5b0)[2]: port write [reg:PxIS] @ 0x10: 0x00000001
ahci_check_irq ahci(0x55f33ed0b5b0): check irq 0x00000000 --> 0x00000000
ahci_irq_lower ahci(0x55f33ed0b5b0): lower irq
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000000
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000000
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000000
ahci_mem_write ahci(0x55f33ed0b5b0): write4 @ 0x238: 0x0000000000000001
ahci_port_write ahci(0x55f33ed0b5b0)[2]: port write [reg:PxCI] @ 0x38: 0x00000001
ahci_start_dma ahci(0x55f33ed0b5b0)[2]: start dma
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000000
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000000
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000000
ahci_populate_sglist ahci(0x55f33ed0b5b0)[2]
ahci_dma_rw_buf ahci(0x55f33ed0b5b0)[2] len=0x8000
ahci_cmd_done ahci(0x55f33ed0b5b0)[2]: cmd done
ahci_trigger_irq ahci(0x55f33ed0b5b0)[2]: trigger irq +DHRS (0x00000001); irqstat: 0x00000000 --> 0x00000001; effective: 0x00000000
ahci_check_irq ahci(0x55f33ed0b5b0): check irq 0x00000000 --> 0x00000000
ahci_irq_lower ahci(0x55f33ed0b5b0): lower irq
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000001
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000001
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000001
ahci_mem_write ahci(0x55f33ed0b5b0): write4 @ 0x210: 0x0000000000000001
ahci_port_write ahci(0x55f33ed0b5b0)[2]: port write [reg:PxIS] @ 0x10: 0x00000001
ahci_check_irq ahci(0x55f33ed0b5b0): check irq 0x00000000 --> 0x00000000
ahci_irq_lower ahci(0x55f33ed0b5b0): lower irq
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000000
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000000
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000000
ahci_mem_write ahci(0x55f33ed0b5b0): write4 @ 0x238: 0x0000000000000001
ahci_port_write ahci(0x55f33ed0b5b0)[2]: port write [reg:PxCI] @ 0x38: 0x00000001
ahci_start_dma ahci(0x55f33ed0b5b0)[2]: start dma
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000000
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000000
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000000
ahci_populate_sglist ahci(0x55f33ed0b5b0)[2]
ahci_dma_rw_buf ahci(0x55f33ed0b5b0)[2] len=0x8000
ahci_cmd_done ahci(0x55f33ed0b5b0)[2]: cmd done
ahci_trigger_irq ahci(0x55f33ed0b5b0)[2]: trigger irq +DHRS (0x00000001); irqstat: 0x00000000 --> 0x00000001; effective: 0x00000000
ahci_check_irq ahci(0x55f33ed0b5b0): check irq 0x00000000 --> 0x00000000
ahci_irq_lower ahci(0x55f33ed0b5b0): lower irq
ahci_port_read ahci(0x55f33ed0b5b0)[2]: port read [reg:PxIS] @ 0x10: 0x00000001
ahci_mem_read_32 ahci(0x55f33ed0b5b0): mem read @ 0x210: 0x00000001
ahci_mem_read ahci(0x55f33ed0b5b0): read4 @ 0x210: 0x0000000000000001
ahci_mem_write ahci(0x55f33ed0b5b0): write4 @ 0x210: 0x0000000000000001
ahci_port_write ahci(0x55f33ed0b5b0)[2]: port write [reg:PxIS] @ 0x10: 0x00000001
ahci_check_irq ahci(0x55f33ed0b5b0): check irq 0x00000000 --> 0x00000000
ahci_irq_lower ahci(0x55f33ed0b5b0): lower irq