#GP when trying to disengage Intel Dynamic Acceleration Technology

[NathanLAAS]

I'm writing an efi app, and as per Intel's documentation, disabling Intel Dynamic Accemeration Technology should be done with:

System software can temporarily disengage opportunistic processor performance operation by setting bit 32 of the
IA32_PERF_CTL MSR (0199H), using a read-modify-write sequence on the MSR.

However, doing

Code: Select all

#define IA32_PERF_CTL               0x00000199
  uint32_t a, d;
  asm volatile (
    "rdmsr\n\t"
    "or $0x1, %%edx\n\t"
    "wrmsr\n\t"
    : "=a" (a), "=d" (d) : "c" (IA32_PERF_CTL)
  );
  

result in a #GP.
I haven't seen any prerequisites that need to be ensured before writing to IA32_PERF_CTL, am I missing something resulting in this #GP?

[Octocontrabass]

Did you check CPUID to make sure your CPU supports Dynamic Acceleration?

[NathanLAAS]

My bad, it seems to be that my CPU does not support IDA, I was too fast to ask lol
As I'm trying to remove any feature that could lead to DVFS and still have some I thought of IDA as the highest probable feature that does such a thing without thinking whether is was possible on my CPU or not.
Thanks for your help!