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I'm trying to understand if running invariant TSC is simultaneous for all cores of a single CPU.
Intel documentation says: "Following a RESET, the counter increments..."
After powering up the CPU, all cores are in a RESET state at the same time, right?(or with an extremely small margin of error can be neglected).
Then, since INIT does not change the counter value, in the case of an invariant TSC, we can assume that the counter value will be the same for all cores (or with a very small error to be neglected), right?

I also don't fully understand if all cores have the iTSC frequency("Core Crystal Clock"), I assume so, but can I be sure?

mrjbom wrote: ↑Tue Dec 31, 2024 6:47 amAfter powering up the CPU, all cores are in a RESET state at the same time, right?(or with an extremely small margin of error can be neglected).

Yes.

mrjbom wrote: ↑Tue Dec 31, 2024 6:47 amThen, since INIT does not change the counter value, in the case of an invariant TSC, we can assume that the counter value will be the same for all cores (or with a very small error to be neglected), right?

Yes, as long as you haven't written to the TSC MSR.

mrjbom wrote: ↑Tue Dec 31, 2024 6:47 amI also don't fully understand if all cores have the iTSC frequency("Core Crystal Clock"), I assume so, but can I be sure?

Yes. See SDM volume 3B section 21.7:

Core Crystal Clock — This is a clock that runs at fixed frequency; it coordinates the clocks on all packages across the system.

Octocontrabass wrote: ↑Tue Dec 31, 2024 4:33 pm

mrjbom wrote: ↑Tue Dec 31, 2024 6:47 amAfter powering up the CPU, all cores are in a RESET state at the same time, right?(or with an extremely small margin of error can be neglected).

Yes.

mrjbom wrote: ↑Tue Dec 31, 2024 6:47 amThen, since INIT does not change the counter value, in the case of an invariant TSC, we can assume that the counter value will be the same for all cores (or with a very small error to be neglected), right?

Yes, as long as you haven't written to the TSC MSR.

mrjbom wrote: ↑Tue Dec 31, 2024 6:47 amI also don't fully understand if all cores have the iTSC frequency("Core Crystal Clock"), I assume so, but can I be sure?

Yes. See SDM volume 3B section 21.7:

Core Crystal Clock — This is a clock that runs at fixed frequency; it coordinates the clocks on all packages across the system.

Great, so I can safely use the iTSC as a system-wide timer.
Thank you for your reply.