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Error in explaining canonical addresses

Posted: Tue Oct 08, 2024 9:40 am
by mrjbom
Here wiki says
For systems supporting 48-bit virtual address spaces, the upper 16 bits must be the same
But Intel's documentation states that the upper 16 bits must be a copy of bit 47, meaning the upper 17 bits must be the same.

Am I correct in understanding that wiki is mistaken in this case?

Re: Error in explaining canonical addresses

Posted: Tue Oct 08, 2024 10:00 am
by nullplan
Correct, the upper 16 bits must be a sign extension of the lower 48. And of course, with the advent of LA57, there needs to be a caveat that it might just be the top 7 bits that need to be an extension of the lower 57.

Re: Error in explaining canonical addresses

Posted: Tue Oct 08, 2024 4:33 pm
by zaval
wiki means what Intel and Amd mean, and they mean the upper 16 bits must be the same ... as the bit 47. combining that bit with them and talking about 17 bits would be confusing, since bit 47 is the used part of the address, it makes up an index into the top table, whereas sign extended bits aren't part of that process, they are just "stuffing" bits.