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Ternary move instructions
Posted: Sat Mar 11, 2023 4:06 am
by linguofreak
Is anyone aware of any ISA that implements the ternary conditional operator as an instruction? Basically, this would be a three operand instruction:
MOVcc x, y, z
That tests some condition, and moves x to z if the condition is true, and y to z if the condition is false?
Of course, conditional branches could be regarded as a special case of this:
jne offset
could be regarded as equivalent to something like the following in an ISA with a ternary move:
movne IP+offset, IP, IP
But I'm not aware of any ISA that has a more general implementation of this concept.
Re: Ternary move instructions
Posted: Sat Mar 11, 2023 6:38 am
by nullplan
So my first thought was "if any, it would be ARM". Not quite, but ARM has a two-operand move instruction and allows you to put conditions on all instructions, so you could
where cc and ncc are opposite conditions.
Come to think of it, you could do the same with CMOV in x86 as well.
Re: Ternary move instructions
Posted: Sat Mar 11, 2023 3:13 pm
by Octocontrabass
Do AVX V(P)BLEND instructions count?
Re: Ternary move instructions
Posted: Sat Mar 11, 2023 9:59 pm
by alexfru
The traditional MIPS ISA has a few conditional moves:
- MOVN rd, rs, rt # if (rt != 0) rd = rs;
- MOVZ rd, rs, rt # if (rt == 0) rd = rs;
- MOVN.fmt fd, fs, rt # if (rt != 0) fd = fs;
- MOVZ.fmt fd, fs, rt # if (rt == 0) fd = fs;
- MOVT.fmt fd, fs, cc # if (FCC[cc] != 0) fd = fs;
- MOVF.fmt fd, fs, cc # if (FCC[cc] == 0) fd = fs;
EDIT to add:
MIPS Release 6 has these instead:
- SELNEZ rd, rs, rt # rd = rt ? rs : 0;
- SELEQZ rd, rs, rt # rd = rt ? 0 : rs;
- SEL.fmt fd, fs, ft # fd = fd.bit0 ? ft : fs;
Re: Ternary move instructions
Posted: Sun Mar 12, 2023 6:51 pm
by t3
ARMv8 A64's CSEL does pretty much exactly that:
CSEL Rdest, Rtrue, Rfalse, cond
Re: Ternary move instructions
Posted: Mon Mar 13, 2023 12:43 am
by linguofreak
nullplan wrote:So my first thought was "if any, it would be ARM". Not quite, but ARM has a two-operand move instruction and allows you to put conditions on all instructions, so you could
where cc and ncc are opposite conditions.
Come to think of it, you could do the same with CMOV in x86 as well.
I'm specifically looking for ISAs that have a single instruction directly equivalent to the ternary operator. Mostly just out of curiousity.
Re: Ternary move instructions
Posted: Mon Mar 13, 2023 12:45 am
by linguofreak
Octocontrabass wrote:Do AVX V(P)BLEND instructions count?
They are very much (in a bitwise fashion) in the same spirit as the type of instruction I'm looking for, but what I'm specifically looking for is instructions that test a one-bit condition and move one of two values to a destination based on that condition.
Re: Ternary move instructions
Posted: Mon Mar 13, 2023 12:52 am
by linguofreak
alexfru wrote:The traditional MIPS ISA has a few conditional moves:
- MOVN rd, rs, rt # if (rt != 0) rd = rs;
- MOVZ rd, rs, rt # if (rt == 0) rd = rs;
- MOVN.fmt fd, fs, rt # if (rt != 0) fd = fs;
- MOVZ.fmt fd, fs, rt # if (rt == 0) fd = fs;
- MOVT.fmt fd, fs, cc # if (FCC[cc] != 0) fd = fs;
- MOVF.fmt fd, fs, cc # if (FCC[cc] == 0) fd = fs;
EDIT to add:
MIPS Release 6 has these instead:
- SELNEZ rd, rs, rt # rd = rt ? rs : 0;
- SELEQZ rd, rs, rt # rd = rt ? 0 : rs;
- SEL.fmt fd, fs, ft # fd = fd.bit0 ? ft : fs;
SEL.fmt appears to be exactly the kind of instruction I'm looking for.
Re: Ternary move instructions
Posted: Mon Mar 13, 2023 11:03 am
by nullplan
linguofreak wrote:I'm specifically looking for ISAs that have a single instruction directly equivalent to the ternary operator. Mostly just out of curiousity.
Well, the only other thing I remember that sort-of fits is PowerPC's fsel instruction
Code: Select all
fsel fd,ft,fa,fb
which does:
fd = ft >= 0? fa : fb
But that is floating-point only, and an optional instruction.