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I am implementing the drivers so that the kernel supports several processors:
1- I did the search in the bios area (EBDA) and found the entry _MP_ (floating pointer structure), I did the checksum, ok
2- Then I got the PCMP (configuration table), I did the checksum, ok
3- I identified the IO PIC inputs and processors.
4- When I read in the configuration table, the field belonging to the address of the local APICs, I get that this address is
in 0xFEE00000, which is consistent with what the BIOS says that the addresses for this type of device are above 0xC0000000.

This memory location is virtual?
Before starting to work with IO-APIC, should I get a physical page and assign it to this virtual address?

That is a physical address. It must be mapped as present, writeable, and non-cacheable somewhere.

Also, have you read the MP specification? The xv6 source code really helped me out as well.

Nexos,
If I have the QUEMU configured with only 256MB of RAM, how is it possible to allocate such a memory location above the physical memory, or am I doing something wrong?

This address is not RAM. Instead, it points to the LAPIC registers. It is called memory mapped because the firmware (to be precise, the chipset) maps this address to the LAPICs registers. Physical address are not necessarily RAM. They can also point to ROM (the BIOS is mapped to memory, yet is on ROM), a hardware device (PCI BARs and the APICs), or video ram(i.e. 0xB8000 points to VGA RAM, not system RAM). This is very important to understand when dealing with device management.

Ok, thank you very much, I am already reviewing the xv6 code, I hope to clarify some doubts.

To see more about why the APIC addresses can exist so high in memory read https://en.wikipedia.org/wiki/Memory-mapped_I/O

Ok, really the address decoder takes care of all this, I had not thought of it that way for this address, really my question is nonsense.

Nexos,
You have tested your implementation with the bochs, because when I do the virtual memory allocation in the kernel directory, it tells me
PANIC (APIC write with len = 1 (should be 4)), disable the cache for this page, I even got the address via
of the rdmsr instructions to check the addresses with those of the bios and they are the same. Will it be an emulator problem?
the same with quemu.

Did you set the cache disable bit in the PTE when mapping it (it is bit 5)?

Yes, (PG_CACHE_DISABLED 0x00000010)

Where can I see the code?

Thank you very much for the help.

My APIC driver is at https://github.com/Nexware-Project/NexO ... on/Lapic.c

The APIC memory base should be a u32 and it should have the volatile keyword. It should work then.