GDT: Downside of Basic Flat Model?
Posted: Wed Mar 28, 2018 7:21 am
Hi, I've been lurking here for a while and started working on a kernel (whenever I'm not procrastinating), starting with the Barebones tutorial.
Currently I've got paging implemented with higher half, but I'm a bit confused by the GDT (I actually wanted to implement interrupts so I can catch Page Faults, but the wiki mentioned I should do the GDT first), so I decided to finally make an account and ask.
The Intel Manual mentions that models other than the basic flat model have hardware protections against program bugs.
What exactly are these protections and how relevant are they while using paging?
Are there any downsides to just using the basic flat model? (Any reason I should not use it? Is it a security issue?)
What should I be considering to pick the right model?
Currently I've got paging implemented with higher half, but I'm a bit confused by the GDT (I actually wanted to implement interrupts so I can catch Page Faults, but the wiki mentioned I should do the GDT first), so I decided to finally make an account and ask.
The Intel Manual mentions that models other than the basic flat model have hardware protections against program bugs.
What exactly are these protections and how relevant are they while using paging?
Are there any downsides to just using the basic flat model? (Any reason I should not use it? Is it a security issue?)
What should I be considering to pick the right model?