Is there any MMIO without read/write side effect?

[jcyangzh]

The simplest system memory model does not use memory-mapped I/O with read or write side effects, does not include a frame buffer, and uses the write-back memory type for all memory

quote from Intel® 64 and IA-32 Architectures Software Developer’s Manual

I wondering is there any MMIO without read/write side effect. For example, assume there is a keyboard device which is memory-mapped to system memory. Suppose the address of data is data_addr, the address of command is cmd_addr.

To read from the keyboard, cpu issue read(data_addr) => data_addr mapped to the keyboard reigster which contains the scan code of the previous keyboard press => cpu cache the memory of data_addr. The cpu could not get the next keyboard press until the cache of data_addr is invalidated, because the next read from data_addr hits the cache.

The same procedure applies to the write process.

So is there any MMIO without read/write side effect? What is read/write side effect?

[Korona]

This simple system memory model the SDM (?) is talking about does not include MMIO.

A read/write side-effect is an action (other than reading/writing the memory location targeted by the read/write) that is taken because of the read/write. Many (but not all!) registers have write side-effects, e.g. an ATA controller might move a HDD's head in response to a write, and start reading data. Some registers even have read side-effects: For example there are devices that have "did-interrupt-fire" registers that unasserted the interrupt once they are read.

An example for memory that has neither read nor write side-effects video memory that is used for a framebuffer or a texture.

In your example no cache would be involved because MMIO with read/write side effects will be mapped as uncachable in the MTRRs.