SWMR (single write multiple read)

[ggodw000]

the primer on cache coherency book I am going through has one interesting assumption which says in a typical modern systems, "it is not possible to for one core to be writing to the first byte of a block while another core is writing to another byte within that block." and defines it to be SWMR (single write and multiple read) invariant, that made me wonder why? Would not it be possible that two or more cores processing completely unrelated process or threads attempt to write to same block of memory? Or is it prevented by some hardware mechanism if so how and why?

[bluemoon]

That processor running completely unrelated process or thread would have to wait the other processor finish its write, (or do hyper-threading while waiting).

[Combuster]

If two processors write a different value to the same location at the exact same time, what happens then? Would you want two caches with different content? Would the result be a mixture of both values written? Neither is desired, so instead writes take turns.

The next thing is that "locations" are bus-sized cache lines and thus typically worth 16 bytes and up. This is an efficiency trick, but it does mean that writing different bytes in the same cache line still block each other as if it were the same byte.

The last step is that when you want to write somewhere, you must prevent anything else from writing there. So if you write to two locations, you have to make sure both locations are safe from writing by other processes. This introduces the possibility of deadlocks if two processes want to write to A and B, and one claims A while the other claims B and neither can claim the other half. Reads require less blocking so it's only a technical requirement to have single writes per operation.

[ggodw000]

OK got it, then it is a deliberate design, obviously. Thanks!