Hi,
bilsch01 wrote:If you have a minute I'd like to discuss this further. For talking purposes let's stay in real mode for a while. When a key is pressed (make or break) somehow the CPU knows to read the address stored at address 0:0024h and to execute the code at the stored address - which is the code for ISR 9.
Full story: The keyboard is constantly "scanning" the keys. You can think of it as a grid of wires, a little like this:
Code: Select all
A -----------O---O---O---
| | |
B -----------O---O---O---
| | |
C -----------O---O---O---
| | |
| | |
0 1 2
By putting a signal through A and then reading at 0, 1 and 2, the keyboard can tell if a key on the top row is currently pressed. Then it can remove the signal from A and put a signal through B and see if a key on the second row is pressed.
There's a little controller built into the keyboard that does this. It also decides if something changed since last time, and if a key is different puts some bytes into an internal FIFO queue. Finally; the controller sends bytes (one bit at a time) to the computer (via. the keyboard cable).
Inside the computer there's another controller (the PS/2 controller) that monitors the port that the keyboard's cable is plugged into; and when it sees bits arriving it reconstructs them to create a byte, and stores that byte into its own "1 byte" buffer. Then it sends a signal to another chip to indicate that a byte has been received.
The other chip is an interrupt controller (e.g. PIC chip). It sees this "I want attention" signal and sets a flag. When it's ready (no higher priority IRQs in service, CPU running with interrupts enabled) it forwards the interrupt to the CPU and tells it which interrupt vector.
The CPU receives this from the interrupt controller, and goes looking in the IVT or IDT for the interrupt handler that corresponds to the interrupt vector; and starts the interrupt handler.
bilsch01 wrote:I, the OS programmer, have to write the the 4 byte address of ISR 9 at address 0:0024h Maybe the code of ISR 9 is in ROM BIOS. If it is, then I need to find its address somehow. Read the spec for the BIOS ? Maybe Ralph Brown's list?
The BIOS IVT is at 0x000000000 and has 4 bytes per entry, so the address of the IVT entry for interrupt 9 is at address 0x00000000 + 9 * 4 (or 0x00000024).
The interrupt handler for interrupt 9 would get the byte from the PS/2 controller, process it, and put a code into the BIOS's "keyboard buffer". These codes are not ASCII; mostly because ASCII can't represent things like "shift + F5". The BIOS's interrupt handler also does a few other things, like detecting if "contrl+alt+delete" was pressed (and rebooting), and detecting if "control+break" was pressed (and passing control to interrupt 0x1B if it was).
Eventually later maybe; software uses int 0x16 to call a BIOS function that fetches the next byte from the BIOS's "keyboard buffer".
bilsch01 wrote:To start out I need to know which ISRs are in ROM BIOS and which ones have to come from my OS. Perhaps all the ones for hardware are in BIOS.
Originally they're all in the BIOS (or in device ROMs); and initially (during early boot) you have to keep the BIOS happy. Later (when you're finished with the BIOS) you throw the BIOS in the trash and replace all of the interrupt handlers with your own. Then you laugh at how lame the BIOS was in comparison to your device drivers ("
LOL, smelly old BIOS doesn't even support Unicode! Hehehe"
).
bilsch01 wrote:Another question: I can't pass a byte from an ISR by using a CPU register, then I must need to create a space in the stack before 'push bp' and use that to pass the byte. Therefore the OS needs to know to pop the byte after the ISR returns. Is that how you do it?
For IRQs, you have to return to the interrupted code as if nothing happened, with all registers containing the exact same values as they originally did. To transfer data you either store it in a buffer somewhere (for something else to fetch later), or use some sort of IPC to send the data.
Cheers,
Brendan