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Hi,
I was reading about the PowerPC architecture and it seems the MMU converts logical addresses to physical, via a hash lookup table.
That would be completely different to x86, and I think that recursive page mapping would not work with PowerPC.

Would someone be able to summarise the MMUs for the major cpu architectures, and if recursive page mapping can be used with them:
x86 - of course we all know recursive page mapping is possible
arm
powerpc
mips
itanic
sparc
any others???

Thanks.

You could probably find and read the relevant documentation to find this out, couldn't you?

There are CPUs, where the MMU does not really have page tables, but only the TLB, which contains a set of pairs of virtual and physical addresses, and the CPU itself does not walk any page tables. If it has no mapping in the TLB, it generates an exception and the handler is expected to provide the mapping/pair and resume execution. This is what you get on MIPS. It's up to you to organize page tables on such architectures one way or another as the hardware doesn't enforce any specific format, recursive or not.

tom9876543 wrote:That would be completely different to x86, and I think that recursive page mapping would not work with PowerPC.

That's right. And page faults play a different role on PPC because you don't point the CPU to the complete mapping, but as you said just to a hash table of it (some models also have an option to use a small set of registers that specify the mapping for a contiguous memory range; so that works somewhat like MTRRs on x86). Another difference is that exception handlers are called in Real Addressing Mode, which would be described as paging turned off on x86.

So yes, different architectures are different, pose different problems and provide different solutions. I haven't written a memory manager on PPC, but I suspect that something like recursive mapping (i.e. some magic that maps all MMU related information to contiguous effective addresses (which x86 people would call virtual addresses)) would be a lot less useful there than it is on x86.