RISC processor core (in VHDL)

Peterbjornx · Post by **Peterbjornx** » Thu Jul 31, 2014 6:28 pm

This was an old project of mine which I used as final assignment for high school

http://peterbjornx.nl/risc_processor/

AndrewAPrice · Post by **AndrewAPrice** » Thu Jul 31, 2014 8:49 pm

That is a really advanced secondary school project! I want to learn VHDL. What tools do you use to debug or simulate it? Have you tested it on a real FPGA?

Peterbjornx · Post by **Peterbjornx** » Fri Aug 01, 2014 7:46 am

I used altera quartus for development and modelsim for testing (both have a free edition) and tested it on an altera DE-1 devkit that i borrowed from the local university

OSDev.org

RISC processor core (in VHDL)

RISC processor core (in VHDL)

Re: RISC processor core (in VHDL)

Re: RISC processor core (in VHDL)