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; This locks the scheduler so it cannot switch thread. This macro is exported by the scheduler.

EnterInt    MACRO
    mov ax,core_data_sel   ; load the unique per-core GDT selector
    mov ds,ax
    add ds:ps_nesting,1     ; disable scheduling
    push ds:ps_sel            ; save the core selector
                        ENDM

; This unlocks the scheduler and checks if some actions needs to be performed after the IRQ. Should be run with interrupts disabled

LeaveInt    MACRO
    local tucDone
    local tucSwap

    pop ds                                        ; restore core selector
    
    sub ds:ps_nesting,1                      ; enable scheduler if ps_nesting becomes -1
    jnc tucDone                                 ; if we are a nested interrupt, just exit
;
    mov ax,ds:ps_curr_thread              ; check if there is a current thread. If not, the scheduler was running
    or ax,ax
    jz tucDone
;    
    test ds:ps_flags,PS_FLAG_TIMER OR PS_FLAG_PREEMPT        ; check for pending actions
    jnz tucSwap
;    
    mov ax,ds:ps_wakeup_list              ; check for pending thread wakeups 
    or ax,ax
    jz tucDone

tucSwap:
    add ds:ps_nesting,1                      ; something needs to be handled, so lock again
    sti
    mov ax,ds
    mov fs,ax
    OsGate irq_schedule_nr                 ; schedule

tucDone:

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This is the handler header, which has local variables that stores the entry DS and 48-bit handler procedure

msi_handler_struc   STRUC

msi_linear          DD ?              ; linear address of code segment so it can easily be modified by the setup-code, but not at runtime
msi_handler_ads     DD ?,?        ; handler procedure
msi_handler_data    DW ?         ; handler data

msi_handler_struc   ENDS

MsiStart:

msi_handler     msi_handler_struc <>        ; put the header first in the code segment

MsiEntry:
    push ds
    push es
    push fs
    pushad
;
    EnterInt
    sti
;       
    mov ds,cs:msi_handler_data
    call fword ptr cs:msi_handler_ads
;
    cli    
    mov ax,apic_mem_sel
    mov ds,ax
    xor eax,eax
    mov ds:APIC_EOI,eax                         ; EOI APIC
    LeaveInt
;
    popad
    pop fs
    pop es
    pop ds
    iretd

MsiEnd:

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irq_handler_struc   STRUC

irq_linear          DD ?                     ; linear address of handler memory (used for resize when chaining)
irq_handler_ads     DD ?,?               ; handler address. Initially set to IrqDetect
irq_handler_data    DW ?
irq_chain           DW ?                   ; chain. Initially set to IrqExit
irq_detect_nr       DB ?                  ; IRQ number for detect. 

irq_handler_struc   ENDS

IrqStart:

irq_handler     irq_handler_struc <>        ; start with the header

IrqEntry:
    push ds
    push es
    push fs
    pushad
;
    EnterInt
    sti
;       
    mov ds,cs:irq_handler_data                               ; call the first handler (detect or IRQ handler)
    call fword ptr cs:irq_handler_ads
;
    mov bx,OFFSET IrqEnd - OFFSET IrqStart            ; setup bx for chaining
    jmp cs:irq_chain                                              ; chain

IrqExit:
    cli    
    mov ax,apic_mem_sel
    mov ds,ax
    xor eax,eax
    mov ds:APIC_EOI,eax
    LeaveInt
;
    popad
    pop fs
    pop es
    pop ds
    iretd

IrqDetect:
    mov ax,SEG data
    mov ds,ax
    movzx bx,cs:irq_detect_nr
    shl bx,3
    add bx,OFFSET global_int_arr
    mov al,ds:[bx].gi_ioapic_id
    mov es,ds:[bx].gi_ioapic_sel
;       
    mov bl,10h                                           ; disable IRQ in IO-APIC
    add bl,al
    add bl,al
;    
    LockIoApic                                          ; take IO-APIC spinlock
    mov es:ioapic_regsel,bl
    mov eax,10000h
    mov es:ioapic_window,eax
;
    inc bl
    mov es:ioapic_regsel,bl
    xor eax,eax
    mov es:ioapic_window,eax
    UnlockIoApic                                     ; release IO-APIC spinlock
;
    movzx dx,cs:irq_detect_nr
    cmp dx,24
    jae IrqDetectDone
;    
    mov bx,OFFSET detected_irqs
    bts ds:[bx],dx                                        ; set mask bit

IrqDetectDone:
    retf32

IrqEnd:

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irq_chain_struc  STRUC

irch_handler_ads     DD ?,?                ; chain handler
irch_handler_data    DW ?
irch_chain           DW ?                    ; next in chain

irq_chain_struc ENDS

IrqChainStart:

irch_handler      irq_chain_struc <>    ; start block with chain header (bx points here)

IrqChainEntry:
    push bx
    mov ds,cs:[bx].irch_handler_data
    call fword ptr cs:[bx].irch_handler_ads        ; call handler
    pop bx
;
    mov si,bx
    add bx,OFFSET IrqChainEnd - OFFSET IrqChainStart    ; setup for next chain
    jmp cs:[si].irch_chain                              ; chain

IrqChainEnd: