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Hello there,
I had a quick question about memory-mapped input/output (MMIO), particularly concerning its function in the early BIOS startup routines.

I'm unsure of how MMIO is implemented. I was originally under the impression that various hardware devices (including what we perceive to be main memory) are allocated a certain predetermined address space that consumes a portion of DRAM. However, I recently stumbled upon an article that stated that the bios/extended bios code as well as the reset vector are memory-mapped on start-up-- before the POST and before the BIOS is even able to determine the amount/type of memory installed in the chipset. How can things (i.e. BIOS code) be mapped into memory before the amount of memory installed on the system is detected? So I went back to the wikipedia article and read something that I had apparently missed before: "[T]he address decoding circuitry... establishes the memory map of the system." The quote seems to indicate that the physical addresses sent by the processor over the system bus are somewhat "logical" in the sense that they are being used to determine whether the information being sent will be routed to DRAM (the actual DIMM chips) or external device memory (the ROM chip on which the BIOS is stored in the context of this question). Is this correct or do IO devices simply use the DRAM for storage as well?

Do you know how address decoding circuitry works ? Some of the address lines, usually the MSB ones feed into logic circuits that drive the chip selects of some devices. This gives the impression that those devices are at some particular address. Have a look at this http://en.wikipedia.org/wiki/Address_decoder

janktrank wrote:Hello there,
I had a quick question about memory-mapped input/output (MMIO), particularly concerning its function in the early BIOS startup routines.

I'm unsure of how MMIO is implemented. I was originally under the impression that various hardware devices (including what we perceive to be main memory) are allocated a certain predetermined address space that consumes a portion of DRAM. However, I recently stumbled upon an article that stated that the bios/extended bios code as well as the reset vector are memory-mapped on start-up-- before the POST and before the BIOS is even able to determine the amount/type of memory installed in the chipset. How can things (i.e. BIOS code) be mapped into memory before the amount of memory installed on the system is detected? So I went back to the wikipedia article and read something that I had apparently missed before: "[T]he address decoding circuitry... establishes the memory map of the system." The quote seems to indicate that the physical addresses sent by the processor over the system bus are somewhat "logical" in the sense that they are being used to determine whether the information being sent will be routed to DRAM (the actual DIMM chips) or external device memory (the ROM chip on which the BIOS is stored in the context of this question). Is this correct or do IO devices simply use the DRAM for storage as well?

When you write to a memory mapped device, the write is intercepted by circuitry external to the processor - probably in the host-PCI bridge - and routed to a hardware device instead of main memory.

At power on, there is no RAM mapped into the CPU's address space, as the DRAM has not yet been initialised. The responsible address decoders will therefore initialize themselves to pass all accesses through to devices. On AMD processors with HyperTransport, this is decided by a pair of MSRs (One which decides where RAM <4GB ends, and another which decides where RAM >4GB ends, so that there can be a device window under the 32-bit barrier) in the core.

The BIOS ROM will be mapped at a specific location in the address space which the processor is specified to execute at power on. If memory serves me correctly, on x86 this is 0xFFFFFFF0. Generally, the first code here may then disable the caches and then (if available) map them into the CPU's address space (so that it has some RAM to play with), and then begin the process of initializing the SMBus controller which it needs in order to access the RAM's SPD ROMs (which both exist to identify the existence of the stick of RAM - hence the name Serial Presence Detect - and to provide information on size and timings). The system will then likely enable the DRAM and program the system's memory controller to map them into appropriate places. The BIOS can then unmap the caches, re-enable them as caches, and program the address decoders.

Now, magically, we have memory. The BIOS will now probably copy (a portion of) the contents of its ROM into RAM < 1MB, in order to enter "normal" real mode.