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Memory Address/Data Registers in Practice

Posted: Thu Aug 11, 2011 3:04 pm
by janktrank
I apologize if this topic is a little unrelated to the particular forum. However, I've recently delved further into some of the details of cpu instruction fetch specific implementations. On many abstract articles I have read in the past, there was mention of two specific hardware registers used primarily for temporary storage when reading to/writing from main memory namely, the memory address register and the memory data (buffer) register. However, when reading more concrete implementation specs for various types of processors (mostly Intel implementations), these registers were not mentioned.

Do these registers actually exist on modern processors, or were they used in older processors and have become standard abstractions to facilitate the explanation of cpu memory reads/writes?

Re: Memory Address/Data Registers in Practice

Posted: Thu Aug 11, 2011 3:13 pm
by Owen
They were sometimes internal registers on older processors - that is, they are registers in the hardware sense (a place where the hardware can latch (store) bits), but not in the architectural bits (a place where an instruction can store bits) - though other internal components could serve the same process.

Modern processors (or, rather, modern high performance processors) have completely different internals, related to things like out-of-order execution, pipelining, superscalar execution, and the inclusion of caches.