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HI,

Hoping someone can help. I am working on getting an OS booted in VMM mode on an intel processor. I am using OWC 17 as the compiler. So far I have paging enabled and working. (32 bit mode with segmentation enabled). I checked the cpuid for the processor I am using and it does support VMX. I allocate a region in memory equal to size shown in IA32_VMX_BASIC_MSR (bits44:32) = 800 so I set it up as 2048 = 2k region size. I set the VMCS revision Identifier as shown in bits 31:0 of this msr = 13 (on my test processor). It is a 4k aligned region. My vmxon address is 66c000 (looks ok). Control Registers:
CR0 = 8001003b
CR4 = 2200
IA32_FEATURE_CONTROL MSR = 0xd
IA32_EFER.LMA = 0x0
EFLAGS = 246
A20 = 0x0
Then when I call vmxon I get interrupt 13 a GP - seems to not like my memory reference to the vmxon region?

Watcom does not have support for the Intel VMX instruction set so had to add lib with opcode for vmxon

unsigned long long vmxon_region;


void __near vmxon(void);
#pragma aux vmxon = \
"nop" \
"nop" \
"push ebx" \
"mov ebx, offset vmxon_region" \
"nop" \
"nop" \
0xF3 0x0F 0xC7 0x33 \
"nop" \
"nop" \
"pop ebx" \
"nop" \
"nop";
I assign the 32 bit addres to vmxon_region (a 64 bit long long) in another function and then call vmxon. I am not real clear about how vmxon works does it take indirect or direct address? Tried both and haven't gotten anything but GP

Thanks, I saw a newsgroup that you needed to call vmxon from a 64 bit code segment. I'll give it a try!

bump

bump

Where?

Are all your segments registers valid ?

Is your code segment readable ?

VMXON takes a memory address that should point to the physical address of the region, similar to how INVLPG works but with a physical address. Intel's SDM Volume 2B describes in depth the scenarios which can cause the VMXON instruction to GP fault. If I had to guess it's probably has to do with the setting of reserved bits in CR0/CR4, the settings of which can be determined from specific MSRs listed in Volume 3B of the SDM. This thread might be of some use to you.

Yes all segment registers are valid
yes code segment is readable
I tried putting the vmxon region in both GS and DS and still get GP.

The MSR's related to setting the control registers:

IA32_VMX_CR0_FIXED0 = 0x80000021
IA32_VMX_CR0_FIXED0 = 0xFFFFFFFF
IA32_VMX_CR4_FIXED0 = 0x2000
IA32_VMX_CR4_FIXED1= 0x67FF
CR0 = 0x8001003B
CR4 = 0x2200

CR0 and CR4 seem to be correct as far as I can tell. I am still thinking that it may be how I am handling the address in the vmxon opcode? I am using an indirect address??

I don't know whether the opcodes are correct, but my understanding is that you pass a register containing a 32 bit pointer to the 64 bit value in memory. I'm not certain you need the 2nd level of indirection. Did you try the opcode sequence ? EDIT: Actually, on 2nd thought, it's very unlikely that I'm right.

ok tried F3 and get invalid opcode?

I used F3 instead of F1 because I am using EBX. I assmume it does not matter which register you use.

Have you checked out this stub I made a while ago? I'm going to re-implement some old code of mine into a more basic OS soon to do some more testing. When I'm at my workstation I'll re-read your issue and see if I can find some differences and hopefully get around to adding information to that wiki article. I'd also be grateful if you did the same as you progress in your VMX journey.

I dug up an old copy of my VMX code. You can find it (and earlier revisions or that plus its associated header) in the ArcticOS repository. http://quokforge.org/projects/arcticos/repository/revisions/145/entry/trunk/Core/vmx.c

Sorry I don't have much else to help with at this time, still juggling a few other things before I get to working on VMX stuff.