intel manuals

[sweetgum]

im reading the intel manuals and it says the following:
a 16 bit registers and a 16 bit external databus, with 20 bit addressing giving a 1 mbyte address space, what is an external databus? and how does that information imply a 1 mbyte address space
another question
the 20 bit addresses that can be formed using a segment register and an additional 16 bit pointer pointer provide a total address range of 1 mbyte, how can 20 bits combined with 16 bits lead to a 1mbyte address range? this is about the 8086/8088
page 2-1 vol 1 basic architecture
any help would be appreciated

[JohnnyTheDon]

20 bit addressing giving a 1 mbyte

2^20 = 1024^2 = 1 megabyte. This is why you need to enable A20 before accessing memory above 1MB, address lines A0-A19 form the 20 bit address bus. AFAIK the 16-bit external data bus means the processor can pull 16-bits from memory in one bus cycle.

the 20 bit addresses that can be formed using a segment register and an additional 16 bit pointer pointer provide a total address range of 1 mbyte, how can 20 bits combined with 16 bits lead to a 1mbyte address range?

In real mode, the CPU uses segment:offset addressing. It uses the formula:

(segment<<4 + offset) = address

This creates a 20 bit address.

[Hangin10]

The 16bit databus means that, at least on the 8086 if I remember correctly, that there are 16 pins for data in/out to RAM.
It's been a long time since I've looked at how one would connect an 8086, although next to me I have one (and a Z80) just waiting for an interesting project to come along.

So the 8086 can move 16bits at one time to/from memory. As for the 20bit addresses, that's formed by:
segment * 0x10 + address. So if the segment is 0xFFFF, and the address in that segment is 0xFFFF, you end up
with 0x10FFEF. But there are only 20 address bits, so it wraps around.

[Brendan]

Hi,

im reading the intel manuals and it says the following:
a 16 bit registers and a 16 bit external databus, with 20 bit addressing giving a 1 mbyte address space, what is an external databus? and how does that information imply a 1 mbyte address space

The "external databus" would be a bus that connects the CPU to everything else (the front-side-bus). One bit can be used to represent values from 0 to 1 (which is 2 values). 2 bits can be used to represent values from 0 to 3 (which is 4 values). 20 bits can be used to represent values from 0 to 1048575 (which is 1048576 values); and if those 20 bits are used as an address then they can represent 1048576 addresses, and if there's one byte at each address that means 1048576 bytes, which is 1 MiB.

another question
the 20 bit addresses that can be formed using a segment register and an additional 16 bit pointer pointer provide a total address range of 1 mbyte, how can 20 bits combined with 16 bits lead to a 1mbyte address range? this is about the 8086/8088
page 2-1 vol 1 basic architecture
any help would be appreciated

It's "address = (segment << 4) + offset". Or (in binary):

Code: Select all

  0000000000000010.... (the segment, 2 << 4)
+     0000000000000010 (the offset, 2)
= 00000000000000100010 (the address, 34)

However, this can overflow and become a 21 bit result:

Code: Select all

   1111100000000010.... (the segment, 63490 << 4)
+      1000000000000000 (the offset, 32768)
= 100000000000000100000 (the address, 1048608)

If the CPU only has a 20-bit bus, then the result won't fit and it will be truncated:

Code: Select all

   1111100000000010.... (the segment, 63490 << 4)
+      1000000000000000 (the offset, 32768)
= 100000000000000100000 (the address, 1048608)
=  00000000000000100000 (the truncated 20-bit address, 32)

Note: The 8086/8088 had a 20-bit bus, but more modern CPUs have a larger bus (e.g. a 36-bit bus or a 48-bit bus). In this case truncation doesn't happen. This caused backward compatibility problems with software that expected the address to be truncated, so they added a hack called the "A20 gate" which disables the 21st address line (forces it to zero) which effectively truncates the result of the real mode address calculation.

In most cases, an operating system will use protected mode where the addressing is entirely different (e.g. 32-bit addressing instead of 20-bit addressing), and disable the A20 gate so it can use the 21st address line.


Cheers,

Brendan

[Troy Martin]

In other words, it's an ugly kludge for an even uglier limitation.