Page 1 of 1
ASM CPUID Processor Speed
Posted: Thu Apr 17, 2008 7:39 pm
by Bobalandi
Is there I way to use CPUID to get the processor speed (frequency).?
I've used the following code to get the vendor name. If it's not possible with CPUID, please give me and idea what to use. Thanks.
Code: Select all
xor EAX,EAX
cpuid
mov DWORD [VendorSign], EBX
mov DWORD [VendorSign+4], EDX
mov DWORD [VendorSign+8], ECX
mov BYTE [VendorSign+12],0x00
ps. I'm using nasm by the way if it's important.
Posted: Thu Apr 17, 2008 8:04 pm
by Hangin10
The Intel manuals have an entire page on this. Try the listing for the CPUID instruction, if I remember correctly it has a nice chart on how to calculate processor clock speed from the processor name (something like "Intel Pentium(R)4 3.06GHz").
Posted: Fri Apr 18, 2008 12:21 am
by xyzzy
I've done that in my OS, however, IIRC support for it was only introduced in the Pentium 4. So, on earlier processors you have to get the info a different way (I think through ACPI or something...)
Posted: Fri Apr 18, 2008 3:25 am
by Bobalandi
So, I'm looking at the intel documentation for this (
here) but I'm not sure which value to put into EAX, would I put in 0H or 1H, or neither.?
Posted: Fri Apr 18, 2008 3:41 am
by JamesM
Just use the performance counter and a shedload of xor %eax,%eax operations.
the fact that the xor uses the same register each time means the pipelining that can be done on it is negligible (i.e. the xors can't go into different ALU's in parallel, as it would yield a different result) so you *should* get a half-decent reading of the cycles-per-second.
That's the Real Man's way (have to do it on some other more archaic archs!)
Posted: Fri Apr 18, 2008 4:17 am
by Combuster
JamesM wrote:Just use the performance counter and a shedload of xor %eax,%eax operations.
the fact that the xor uses the same register each time means the pipelining that can be done on it is negligible (i.e. the xors can't go into different ALU's in parallel, as it would yield a different result) so you *should* get a half-decent reading of the cycles-per-second.
Actually, they can - recent processors decode xor reg,reg as mov reg, 0, which is not pipeline hostile at all, and with register renaming can fill up all ALUs every cycle.
the proper sequence is more like
Code: Select all
xor ecx, edx
xor edx, ecx
xor ecx, edx
xor edx, ecx
etc
Posted: Fri Apr 18, 2008 5:39 pm
by Bobalandi
So, I'm supposed to manually do it by causing a bunch of cycles and evaluating the time.?