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Everyone today seems to be using the PIT for counters and scheduling in their kernel. I've been doing a bit of reading on APIC, xAPIC and x2APIC and I thought about using the APIC Timer instead. I realize that this hardware is not always present, but if it's not, the PIT could be used instead. Doing it this way would give programmers (when APIC is present) an extra counter to use in their software (which would otherwise be used by the kernel). Any comments?

Everyone today seems to be using the PIT for counters and scheduling in their kernel.

Not quite true - I'm using the local APIC timers and have come across many others on this forum doing the same thing. In fact, using the local APIC makes sense, because you have a separate time source for each CPU, rather than scheduling everything from a single IRQ.

If you are designing primarily for x86_64, you can pretty much assume that a local APIC will be present.

Cheers,
Adam

Hi,
The local apic frequency is pretty much dependent on the Motherboard speed.So getting accurate timing will depend on the motherboard frequency.
How do you guys do to cope with that?

Hi,

Have a look at this topic, which is referenced from the APIC wiki article. It does still mean relying on the PIT initially.

Cheers,
Adam

Hi,
The local apic frequency is pretty much dependent on the Motherboard speed.So getting accurate timing will depend on the motherboard frequency.
How do you guys do to cope with that?

I took a look at the article.
The only thing i can say is that you guys practice Witchcraft
Where do you get your ideas from.
You are too powerful for me.

AJ wrote:Have a look at this topic, which is referenced from the APIC wiki article. It does still mean relying on the PIT initially.

What about laptops with constantly changing speeds? Or does this only affect the CPU speed, but not the bus speed the APIC speed is derived from?


JAL

Do the frequency of laptops actually change?
If its the case then it will be somehow hard to use the APIC on laptops.

einsteinjunior wrote:Do the frequency of laptops actually change?
If its the case then it will be somehow hard to use the APIC on laptops.

The CPU frequency definitely does, but I'm not sure whether other frequencies (e.g. bus frequency) do as well, that's why I asked.


JAL

It would have surprised me because the components connected to the motherboard bus usually have constant frequency,so it would have been difficult from the design point of view to change the motherboard frequency yet maintaining the same speed for the components.

I would certainly think it's possible - overclockers motherboards have been available for a while which allow you to change the FSB (am I using outdated terminology?) frequency, whilst keeping the PCI frequency unchanged.

As to whether laptops do this to save power, someone with more hardware knowlege needs to answer. Brendan, perhaps would know the answer?

Cheers,
Adam

Hi,

AJ wrote:I would certainly think it's possible - overclockers motherboards have been available for a while which allow you to change the FSB (am I using outdated terminology?) frequency, whilst keeping the PCI frequency unchanged.

As to whether laptops do this to save power, someone with more hardware knowlege needs to answer. Brendan, perhaps would know the answer?

IMHO it's safe to assume that the bus speed is either:

• - set to a fixed frequency via. motherboard jumpers (typical for old CPUs).
  - set to a constant frequency by the BIOS (typical for newer CPUs). In this case it may be theoretically possible to change the bus speed via. software (e.g. some sort of motherboard driver).

Note 1: This includes FSB and hyper-transport.
Note 2: AFAIK for hyper-transport the width of the link can also be changed.
Note 3: To reduce power consumption, I assume that for hyper-transport the width of the link is reduced while the frequency of the link remains the same (as this allows part of the link to be turned off completely, rather than remaining on while operating at a slower speed with the same power consumption at idle).
Note 4: For now, I'm guessing Intel's CSI will have similar characteristics to AMD's hyper-transport.

Basically, unless your OS includes a "motherboard driver" that's capable of changing the bus speed (using chipset specific magics), then it's safe to assume that the bus speed (and therefore the local APIC timer speed) is constant under all scenarios (including power management in laptops).


Cheers,

Brendan

The FSB can be changed independant of the PCI bus speed, which that can also be changed independant of a PCI-e 16's individual bus speed.

Also, some mobo's such as mine, allow you to drop/raise the cpu multiplier, so IMHO finding the default fixed values can sometimes be horribly incorrect.

It sounds, then, like there has to be a method for a Mobo driver to broadcast to the rest of the system when there is an FSB speed change -- so the rest of the system knows to recalibrate timing.

a lot of os cant change the internal timing frequency