FUSE filesystem?

[zap8600]

Hi. I finally have a Github page! https://github.com/zap8600/CCOS. Although, I don't have a bochrs.txt script. Is that necessary? I kept getting errors trying to load my OS in Bochs. It said that in order to start, I need at least one argument or option it something called a bochrs. I just assumed it would work.

[nexos]

Bochs does require a bochsrc.txt file. Look at https://bochs.sourceforge.io/doc/docboo ... chsrc.html for details about it

[zap8600]

Hi. So I'm having trouble with bochs. It's not reading my code. It is a .bin file. And the code on Github is broken. When I compile my code from Github (which was fine before) and I load it in QEMU, I get a disk read error from my OS. Can someone see what is wrong?

[BenLunt]

Hi. So I'm having trouble with bochs. It's not reading my code. It is a .bin file. And the code on Github is broken. When I compile my code from Github (which was fine before) and I load it in QEMU, I get a disk read error from my OS. Can someone see what is wrong?

I'm sorry, but you need to give us a lot more information.

What didn't work?
What didn't read your code?
I looked at your GIT page and you don't have a .bin file that we can look at. There is little to no instructions on how to make a bin file from your code. (I don't take the time to build repo's. If there is a binary file ready for booting, I will try it. If there is no binary file, I don't even try)
What was the error Bochs gave you, if any?
I didn't see a bochsrc.txt file on your git page for us to look at.
How is the code on Github Broken? Is it because of bad code or a bad upload?

OS Development is not easy, though it is quite rewarding when you make progress, but it takes time and effort to find out why something isn't working. Load it through a debugger (Bochs has one) and see what is happening. Does it make it to 0x07C00? If so, how much further past that does it make it? Are the register values what you think they should be at that point?

Ben
- http://www.fysnet.net/osdesign_book_series.htm

[zap8600]

Hi. Bochs wasn't able to detect a bootable drive. I did try to convert my .bin file to a .img file, but I don't think that worked. I'm going to try rebuilding my cross-compiler because on the current laptop I'm using to code, I just copied the compiler from another system I had. As of writing this, I'm in school, so when I get home I will upload a new .bin file and my bochsrc.txt file. Before I uploaded my code, it did successfully compile. When I downloaded the code from Github, it did compile, but instead, when I tried to run the compiled image Bochs, it said it wasn't bootable. When I tried to run the compiled image (not the converted one) in QEMU, my OS gave me a disk error after trying to load the kernel into memory. all the registers are the same. My bootloader has a memory offset of 0x7c00.
P.S. For the IDE drive, how do I read and write with an offset? I don't want accidentally read the wrong data or write to the wrong address. This is for getting disk numbers and putting them into IDE Compatibility Mode. Also, do USBs have an IDE Compatibility Mode? Also, how do I save the dl register so that the kernel knows what drive it booted from? Also, do I have to put the drive into IDE Compatibility Mode from the bootloader? And just so you know, since I've started developing my OS, I've know that I can't use BIOS interrupts.

[BenLunt]

Hi. Bochs wasn't able to detect a bootable drive. I did try to convert my .bin file to a .img file, but I don't think that worked. I'm going to try rebuilding my cross-compiler because on the current laptop I'm using to code, I just copied the compiler from another system I had. As of writing this, I'm in school, so when I get home I will upload a new .bin file and my bochsrc.txt file. Before I uploaded my code, it did successfully compile. When I downloaded the code from Github, it did compile, but instead, when I tried to run the compiled image Bochs, it said it wasn't bootable. When I tried to run the compiled image (not the converted one) in QEMU, my OS gave me a disk error after trying to load the kernel into memory. all the registers are the same. My bootloader has a memory offset of 0x7c00.

This usually means you don't have the necessary signature at the end of the sector.

P.S. For the IDE drive, how do I read and write with an offset?

I don't know what you mean. When you tell the controller to read a sector, you have to read the whole sector from word 0 to word 255. You cannot read just one word within that sector. You have to read the whole sector.

Also, do USBs have an IDE Compatibility Mode?

:-)

Also, how do I save the dl register so that the kernel knows what drive it booted from?

I have discussed this in previous posts and within my book, in quite detail. Search previous posts for this exact question.

Also, do I have to put the drive into IDE Compatibility Mode from the bootloader?

No, you simply rely on the fact that the BIOS has done everything necessary to read sectors simply by calling the service. I think you need to forget about IDE Compatibility mode. It is used in older PCI devices (and not really required) and with newer AHCI devices. If you place the correct line in your bochsrc.txt file, you will have an IDE drive, period. Same with QEMU. If your real hardware doesn't have an IDE drive, you are out of luck when testing your IDE code on it.

Ben

[zap8600]

Hi. I found out that there is nothing wrong with my code! Just for some reason, on my current laptop, I have to set the image as a floppy disk instead of a hard disk. Which book did you talk about preserving the dl register in? My bootloader stores the dl to a point called BOOT_DRIVE. When I was talking about reading and writing with an offset, I was talking about reading from a certain point in the data I retrieved so that I don't have to process the information that comes before the data I actually need, and writing to a certain point so that I don't have to write extra data. I'm not trying to cut corners for less work, I'm just trying to make my kernel take up less space. If you look at the PDF I based my driver off, the part that confuses me is when the driver writes to the 0x1f7 port. Do your books talk about this?

[zap8600]

Hi. So now, if you've read my Github page's README.md recently, you'll know that I'm working on a Sound Blaster 16 driver. The only thing is that I don't know much about IRQs. What exactly am I supposed to be handing? What data do I read and/or write from/to? How to I wait 3 microseconds in 32-bit protected mode? What is the difference between signed and unsigned data?
P.S I'm going to be using IRQ 5.

[nullplan]

How to I wait 3 microseconds in 32-bit protected mode?

That at least I can answer. Possibility one is busy waiting. You read a timer you know the speed of, and add the number of ticks to it that will elapse until the time is up. Then you continuously read the timer until the deadline is reached. This strategy works on any computer and any mode. Example with the TSC:

Code: Select all

static unsigned ticks_per_usec;
void usleep(unsigned usecs) {
  uint64_t deadline = rdtsc() + usecs * ticks_per_usec;
  while (rdtsc() < deadline)
    asm("pause" ::: "memory");
}

In case of the TSC you don't know the speed off-hand, so you have to use another timer (say, the PIT) to initialize ticks_per_usec. You can wait 100ms with the PIT and see how much the TSC advanced in that time. ticks_per_usec is then one hundred thousandth of that amount. Or you wait one second with the RTC, and set ticks_per_usec to one millionth of the amount the TSC advanced

So this is easy to do and only requires a little bit of prep work, but the downside is that you are keeping the CPU active for the whole wait time. Which granted, isn't a lot when you are waiting a few microseconds, but for longer times you might want to look at what timers are available with interrupting capabilities. You typically have at least the PIT and the HPET, but also the LAPIC timer and the ACPI PM timer can be available. Take your pick among the available choices, they are all good. Then you only register an interrupt to happen in whatever wait time you need, and wait for the interrupt.

[zap8600]

Hi. So that'll be helpful, but then what about the interrupt? I have little knowledge on the subject and on how my OS handles them (yes, I have studied the interrupts my OS has and how they work, so I have a basis). I could use what I know to add it, but I don't know what I'm supposed to put in the interrupt. I've found little information online, and the information there is on the OSDev Wiki, it doesn't specify what it should do.

[zap8600]

Hi. So I'm wondering if I can use the PIT for waiting 3 microseconds. I'm eventually going to use a RTC, but I need a way to handle the interrupt, how to configure the time mode, and how to get the code. Until then, this is what I have for that:

Code: Select all

/* This is in cpu/rtc.c. *
/* Note that none of this is in my Github repository. */
#include "ports.h"
#include "isr.h"
#include "rtc.h"
#include "../libc/function.h"

void rtc_callback(registers_t regs) {
    /* Nothing really in here. */
    UNUSED(regs); /* This is in function.h and is used to keep parameters to a function for later use. */
}

void init_rtc(int rate) {
    asm volatile("cli");
    port_byte_out(0x70, 0x8A);
    port_byte_out(0x71, 0x20);
    asm volatile("sti");

    register_interrupt_handler(IRQ8, rtc_callback);

    asm volatile("cli");
    port_byte_out(0x70, 0x8B);
    char prev=port_byte_in(0x71);
    port_byte_out(0x70, 0x8B);
    port_byte_out(0x71, prev | 0x40);
    asm volatile("sti");

    rate &= 0x0F;
    asm volatile("cli");
    port_byte_out(0x70, 0x8A);
    char prev=port_byte_in(0x71);
    port_byte_out(0x70, 0x8A);
    port_byte_out(0x71, (prev & 0xF0) | rate);
    asm volatile("sti");
}

Could someone review this code?
P.S. I also need help with code for waiting a couple of microseconds and code for a Sound Blaster 16 interrupt handler on IRQ 5.

[Octocontrabass]

Code: Select all

void rtc_callback(registers_t regs) {

It looks like you might have copied this code from a buggy tutorial.

[zap8600]

Code: Select all

void rtc_callback(registers_t regs) {

It looks like you might have copied this code from a buggy tutorial.

Hi. I said on my Github page that my OS is based off of a tutorial. I built off of their code. I've almost got down how it fully works. This works for the other interrupts.

[zap8600]

Hi. So I have decided to switch from IDE drives to ATA/ATAPI drives. But I need insl and outsl. Can I add the following to my cpu/ports.c file?

Code: Select all

void port_longword_string_in(u16 port, u32 dest, u32 count) {
    u32 result;
    __asm__("rep insl" : "=d(port), "=c"(count) : "D"(result));
    dest = result; /* Does dest need to be a char? */
}

void port_,longword_string_out(u16 port, u32 data, u32 count) {
    __asm__ __volatile__("rep outsw" : "=d"(port), "D"(data), "c"(count) : );
}

[Octocontrabass]

So I have decided to switch from IDE drives to ATA/ATAPI drives.

What's the difference? As far as I know, those are the same thing.

But I need insl and outsl.

Do you really? Not all HBAs support 32-bit access to the data port. It's better to stick to 16-bit.

Can I add the following to my cpu/ports.c file?

It won't work. Your input and output operands are wrong.