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Wajideu wrote:

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$(MAKE) -C "$(MySubProject_DIR)" all

PROJECTS   = MySubProject

MySubProject_DIR = My Sub Project

all: $(PROJECTS)

$(PROJECTS):{
    foreach($(MySubProject_DIR), dir){
        include $(dir)
    }
}

b.zaar wrote:

Wajideu wrote:

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$(MAKE) -C "$(MySubProject_DIR)" all

That's the magic line I was looking for. My idea of make++ would avoid this and also be able to determine if the project needs to be built without another make process being spawned.

Wajideu wrote:Isn't spawning another make process kinda necessary when you're calling a separate makefile? Unless you plan to change the directory and use an include statement, but that's just messy.

b.zaar wrote:Thinking about it a bit more make -C could do automatic encapsulation for a tradition makefile and some of the {} code blocks wouldn't even be needed.

all-MyPlan:
   $(MAKE) -f $(lastword $(MAKEFILE_LIST)) build-MyPlan RULE=MyPlan


ifeq ($(RULE),MyPlan)
STEPS = MyStep1

SRCS = main.c

build-MyPlan: $(addprefix --MyPlan-,$(STEPS))
   @echo plan complete
--MyPlan-MyStep1:
   @echo step 1 complete
endif

Wajideu wrote:

b.zaar wrote:Thinking about it a bit more make -C could do automatic encapsulation for a tradition makefile and some of the {} code blocks wouldn't even be needed.

That's actually what I did before in the example I showed you:

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all-MyPlan:
   $(MAKE) -f $(lastword $(MAKEFILE_LIST)) build-MyPlan RULE=MyPlan

b.zaar wrote:Aren't you still spawning a new proc with this line?

Wajideu wrote:Maybe we could get a little collaboration going on. I don't really have any specific details in mind regarding the format of Planfile atm; I'm just winging it; and your idea for make++ seems pretty well structured.

I'm aware there are plenty of standards to choose from. I just don't like any of them. So of course, I'm going to bask in the irony of making my own.

Wajideu wrote:I'm not entirely sure how 'make' handles process execution.

b.zaar wrote:1. This

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$foreach

should either be

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$(foreach ...)

or just

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foreach()

but only within a code block.[/code]

b.zaar wrote: 2. Planfiles again?

make++ works directly with makefiles. If you really want then add the following

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ifndef $(_MAKE_PP_)
$(error This project requires make++)
endif

::MyPlan:
{
	:MyStep1:
	{
		MyRule1: { }
	}

	:MyStep2: { }

	MyRule2: { }
}

Wajideu wrote:Yes, because we're not just making the project, we need to configure and cache settings. Additionally, as I said before, I wanted to provide a clean way of declaring a multi-step build process.

iansjack wrote:I predict a poor future for your "standards".

b.zaar wrote:What do you want to configure in detail and how would you like to see it? I'm assuming it's a script with a lot of autodetecting installed software etc.

b.zaar wrote:And what exactly is a multi-step build process?

Wajideu wrote:The same things you'd do with autotools; detecting the presence of programs, headers, and functions. Detecting the host and target platforms, handling user specified options like "--disable-nls", etc.

# Top level Makefile

# Make++ check
ifndef $(_MAKE_PP_)
$(error This project requires make++)
endif

all: foo bar

CONFIG_FILE := config.mk

ifeq ($(MAKECMDGOALS), config)
include configure.mk
endif

-include $(CONFIG_FILE)        # Saved configuration settings after running 'make config'
include foo.mk
include bar.mk

# configure.mk

config:{

# This would be all your AC stuff
# The minimum gcc version numbers
REQUIRED_CC = 4.8

# Check standard headers are installed
REQUIRED_HEADER_STDC = 1

# Check format of time header
REQUIRED_HEADER_TIME = 1

# A static script, maybe in the make++ include directory
include autoconfig.mk

# Manual check for external programs needed not in the autoconfig check list
# This requires more processing to strip the version form the output string
PERL_VERSION = $(shell perl -v)

}
    

# autoconfig.mk
# This is basically the equivalent configure script generated by autotools
# written in make++ script format. 
# Make++ handes the script so a bash shell isn't required.
#
# Straight scripting code so needs to be included after all the configuration setup.

ifdef($(REQUIRED_CC)){
    # Usual bash scripts for checking in make++ script form
}

# Continues with all the usual check scripts
# Writes all saved options to $(CONFIG_FILE)

Wajideu wrote:There are several cases in which a person would need to build a project in multiple stages. For example, they may need to build tools to build a part of themselves, the user may be performing a Canadian cross compilation, or another example being something like binutils/gcc where you have to build both first in order to compile the C runtime and rebuild them a second time to link against it.