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Posted: Fri Jun 29, 2007 11:53 am
by Edwin
[quote]
4.2.2. Stack Alignment
The stack pointer for a stack segment should be aligned on 16-bit (word) or 32-bit (double-word)
boundaries, depending on the width of the stack segment. The D flag in the segment descriptor
for the current code segment sets the stack-segment width (see “Segment Descriptorsâ€
Posted: Sat Jun 30, 2007 12:26 am
by Pyrofan1
Posted: Sat Jun 30, 2007 3:31 am
by inflater
If a 16-bit value is pushed onto a 32-bit wide
stack, the value is automatically padded with zeros out to 32 bits.
Intel manuals say all!
Okay okay, I will read them more...
inflater
Posted: Sat Jun 30, 2007 6:40 am
by Aali
i hate to break it to you, but thats just wrong
i have code that DEPENDS on this behaviour
the following code:
push word ax
push word 0x4040
inc esp
push 0x5b585252
push word ax
produces this stack:
0xbfe0ac73: 0xcd 0x80 0x52 0x52 0x58 0x5b 0x40 0xcd 0x80
notice the complete lack of zero padding
Posted: Sat Jun 30, 2007 6:49 am
by Edwin
perhaps removing "word" will do the trick..
Posted: Sat Jun 30, 2007 6:59 am
by Tyler
Edwin wrote:perhaps removing "word" will do the trick..
The "word" is there to force 16-bit and prove that on his processor stack alignment is not forced with padding.
Posted: Sat Jun 30, 2007 8:37 am
by Edwin
Okay, that may be right, but there is no reason why an ordinary push bx or pop bx should screw up stack alignment.
Posted: Sat Jun 30, 2007 8:54 am
by inflater
The "word" is there to force 16-bit
I'm confused..
Why to force 16-bit? The stack will become, logically, unaligned then...
Never mind that, I heard MOV EAX, [ESP - X] should do the POP operation without screwing the stack. What I need to appoint for the X when I want to pop the last dword on the stack? 8? And for word value, 4 ?
inflater
Posted: Sat Jun 30, 2007 10:26 am
by Aali
Edwin wrote:Okay, that may be right, but there is no reason why an ordinary push bx or pop bx should screw up stack alignment.
the problem is, there is no "ordinary" push bx or pop bx, you have to use the 0x66 prefix (which turns it into a 16bit operation)
56 00000042 6650 push word ax
60 0000004E 6650 push ax
exactly the same opcode, the word is just there to clarify things a bit
Posted: Sat Jun 30, 2007 11:19 am
by Edwin
Hmm I tried it myself and it seems you're right Aali, it seems that successive 16-bit push and pops indeed screw up the alignment, but when I do a push ax and then a 32-bit push, stack alignment seems normal.
So I think that the CPU tries to align the stack to the size of the pushed or popped value. It's confusing because the Intel-manual is not clear about this issue (as far as i've seen).
