- You're using 4 different files to handle everything. One of the main points of this was to make a tool that didn't pollute the source directory with a bunch of crap.
- I don't think that "ifndef $(_MAKE_PP_)" would make it Make compatible. I'm pretty sure GNU Make does semantical checking of the entire file before it executes anything. It'll probably throw an error about incorrect formatting before it even parses this block.
- The "ifeq ($(MAKECMDGOALS), config)" and "-include $(CONFIG_FILE)" lines are very hackish.
- If make++ is incompatible with make, why try so hard to implement workarounds for the shortcomings of make? Why not just focus on making the language simple and implementing the features we desire, then using 'plan' to convert that (along with the configuration) into a Makefile? You seem deadset on not wanting to have a Planfile, but in the process of trying to avoid it you're having to add a bunch of other files and hackish workarounds.
Make doesn't handle it natively. Sure, you can go the long route with the hassle of keeping track of the programs built, touching files, and executing shell scripts inbetween stages, but I figured we could probably find a way to avoid that hassle by adding in a plan/step/rule process which would allow you to encapsulate all the rules for a particular target in one block. Eg.b.zaar wrote:If make already handles it natively so would make++.Wajideu wrote:There are several cases in which a person would need to build a project in multiple stages. For example, they may need to build tools to build a part of themselves, the user may be performing a Canadian cross compilation, or another example being something like binutils/gcc where you have to build both first in order to compile the C runtime and rebuild them a second time to link against it.
Code: Select all
::$(PROJECT1):
{
:Step1:
{
all:
@echo building all
clean:
@echo cleaning all
}
.c.o:
{
$(CC) $(CFLAGS) -c -o $@ $<
}
}
::$(PROJECT2):
{
:Step1:
{
all:
@echo building all
clean:
@echo cleaning all
.c.o:
{
$(CC) $(CFLAGS) -c -o $@ $<
}
}
:Step2:
{
all:
@echo building all
clean:
@echo cleaning all
.c.o:
{
$(CC) $(CFLAGS) -c -o $@ $<
$(OBJCOPY) -F binary $@
}
}
}
I've begun working on this already btw. I'll put the source up on git once I get a little further along. I'm using flex/bison as well.