8086, 80386 and x86-64 compatible instructions
Re: 8086, 80386 and x86-64 compatible instructions
I have tried to find it in the old Intel 8086 manual but it always ends up being a "not used" instruction. Is it like an undocumented instruction that has always worked? It is hard to believe that NASM has this kind of bug because it has been in use so long. I want to be wrong.
Re: 8086, 80386 and x86-64 compatible instructions
it is an s:w instruction -- that is the last two bits of the first byte indicate the size of the operands:
00 - 8-bit immediate, 8-bit destination
01 - 16-bit immediate, 16-bit destination
10 - nonsense on 8086 (would be 8-bit immediate sign extended to 8-bit destination)
11 - 8-bit immediate sign extended to 16-bit destination -- this is the encoding nasm is using, to represent 8-bit '01' sign extended and ANDed to the 16-bit AX
8086 does support sign-extended immediates using s:w, but doesn't list this as an s:w instruction (well, i don't have a proper "manual" but my 1982 intel catalog does list the full instruction set), so it is likely supported, but undocumented, though I don't have any way to confirm that
00 - 8-bit immediate, 8-bit destination
01 - 16-bit immediate, 16-bit destination
10 - nonsense on 8086 (would be 8-bit immediate sign extended to 8-bit destination)
11 - 8-bit immediate sign extended to 16-bit destination -- this is the encoding nasm is using, to represent 8-bit '01' sign extended and ANDed to the 16-bit AX
8086 does support sign-extended immediates using s:w, but doesn't list this as an s:w instruction (well, i don't have a proper "manual" but my 1982 intel catalog does list the full instruction set), so it is likely supported, but undocumented, though I don't have any way to confirm that
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Re: 8086, 80386 and x86-64 compatible instructions
Instructions like and ax, 2 have always been available. It used to be the case that the only shift instructions with immediate operands were those with shifted the contents of a register by one bit, as in shl ax, 1. All other shifts had to be of the form shl ax,cl, and it had to be the cl register.
Similarly, in/out instructions could only take an immediate operand in the port number was below 0x80. For other ports, the port number had to be loaded into the dx register. out dx,al or in al,dx. Push and pop instructions could never take immediate operands.
And so on.
Anyway, except for a real mode boot loader, all of that has been left behind now.
Similarly, in/out instructions could only take an immediate operand in the port number was below 0x80. For other ports, the port number had to be loaded into the dx register. out dx,al or in al,dx. Push and pop instructions could never take immediate operands.
And so on.
Anyway, except for a real mode boot loader, all of that has been left behind now.
The continuous image of a connected set is connected.
Re: 8086, 80386 and x86-64 compatible instructions
irrelevant -- we are not discussing whether or notmathematician wrote:Instructions like and ax, 2 have always been available. It used to be the case that the only shift instructions with immediate operands were those with shifted the contents of a register by one bit, as in shl ax, 1. All other shifts had to be of the form shl ax,cl, and it had to be the cl register.
Similarly, in/out instructions could only take an immediate operand in the port number was below 0x80. For other ports, the port number had to be loaded into the dx register. out dx,al or in al,dx. Push and pop instructions could never take immediate operands.
AND R/M16, imm16
is legal on 8086, we are talking about whether
AND R/M16, imm8
is legal on 8086 -- did 8086 support sign-extended immediate on AND instruction, that is the question (the manuals don't list it, but nasm emitted it)
edit:
found this on nasm page:
Code: Select all
AND rm16,imm8 8086,LOCK
Re: 8086, 80386 and x86-64 compatible instructions
It is not just 8086 but I wonder whether it is available on 80286. Why on earth the 8086 manual left just the "AND" undocumented if it was available? AND is the "83 MOD 100 R/M".
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Re: 8086, 80386 and x86-64 compatible instructions
Opcode 83 /4 isn't specifically mentioned in any 8086 or 8088 manuals I can find, but it (along with opcode 82) is present in the opcode matrix in the IBM 5150 technical reference manual.
If you can find someone to solder new capacitors into my Toshiba T1000SE, I can test these opcodes on a real 8086 to confirm that they work.
If you can find someone to solder new capacitors into my Toshiba T1000SE, I can test these opcodes on a real 8086 to confirm that they work.
Re: 8086, 80386 and x86-64 compatible instructions
82?? that would certainly be a strange instruction (that would be the nonsense instruction i mentioned before about sign extended an 8-bit immediate to 8 bits...Octocontrabass wrote:Opcode 83 /4 isn't specifically mentioned in any 8086 or 8088 manuals I can find, but it (along with opcode 82) is present in the opcode matrix in the IBM 5150 technical reference manual.
Re: 8086, 80386 and x86-64 compatible instructions
Funny that TEST r/m16, imm8 has never been supported.
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Re: 8086, 80386 and x86-64 compatible instructions
That's because TEST r/m8, imm8 and TEST r/m16, imm16 are opcodes F6 /0 and F7 /0. Had those instructions been mapped to opcodes 80 and 81, it probably would be supported by now.
Re: 8086, 80386 and x86-64 compatible instructions
For me the "83 /4" is suspicious enough and I simply stop using it if I want to have 8086/80286 compatible code. It may work but the 8086 manual explicitly says it is not used and the 80286 manual does not mention it. Enough reasons for me.