Makefile Tool

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Nessphoro
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Makefile Tool

Post by Nessphoro »

Hello, my fellow OsDevers,

Today, I was peacefully working on my OS, when I decided to organize my code and have specific directories for different modules/system (like a folder for HAL or perhaps for API's, y'know)
And became really frustrated with makefile's and the gimmicks to make this work. Doing this manually wasn't a solution, too.

Well, then, in a matter of hours I wrote a tool (for Windows, but I assure you, it should work with Mono on Unix) that does just that - only with some features.

So, here I introduce you the Hydra Makefile Generator ( Somehow, I feel as though there is already a solution for this, and I just didn't search well enough - oh well), a console app that generates makefiles, which includes all the source files in the "source" directory (also it takes care of the dependencies from .h files). Probably the biggest feature is that it has a continuous mode, where it monitors the file-system and generates the makefile on the fly (also it monitors removed files, so if I delete ACPI.cpp it's object file will be removed as well).

It does make some assumptions that might be considered unacceptable, but they are easily fixed by modifying the source, which is - for your convenience - published under the BSD license.

It has out-of-the-box support for ASM,C,C++ but can easily be modified to include others as well.

Source is attached.

P.S. Wanna hear your guys' feedback, or at least know if this is useful.
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Last edited by Nessphoro on Tue Jan 01, 2013 11:09 pm, edited 2 times in total.
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bluemoon
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Re: Makefile Tool

Post by bluemoon »

For source files within the same directory, you can do:

Code: Select all

KERNEL_C :=$(wildcard path/*.c)
KERNEL_OBJ := $(patsubst %.c, %_c.o, $(KERNEL_C))
Note than plain old make (eg, shipped in FreeBSD) do not support :=, in that case use gmake or replace that with = (causing make to re-scan for each reference of variable)

For multiple sub-directory (like those drivers), I wrote a shell script to generate Makefile contain all targets
I can post the script if you are interested, it's just hundred of lines.
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Nessphoro
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Re: Makefile Tool

Post by Nessphoro »

Ah, yes, I knew a shell solution was present - unfortunately I'm not into bash.
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bluemoon
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Re: Makefile Tool

Post by bluemoon »

By the way these are my suggestion (which I do in my project):
1. Support temp path for object files(and .d files), for the reasons: cleaner for ls, cleaner for kdev/eclipse view, and healthier for SSD drive.
2. There are about twenty extra warning can be enabled on top of -Wall -Wextra
3. Generate debug symbols file
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Nessphoro
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Re: Makefile Tool

Post by Nessphoro »

-ggdb was in the earlier version, dropped it - you can add it to the CC_FLAGS easily.

Edit: Added that option, along with the /tmp/ output.
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dozniak
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Re: Makefile Tool

Post by dozniak »

Somehow, I feel as though there is already a solution for this, and I just didn't search well enough - oh well
www.cmake.org

combine that with Ninja and you have something very cool and fast.
Learn to read.
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