What should be in the Hardware Abstraction Layer?

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zeitue
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What should be in the Hardware Abstraction Layer?

Post by zeitue »

What should be in the Hardware Abstraction Layer (HAL)?
I think it's different depending on the type of kernel structure used (Micro Monolithic, Exo, Hybrid, Pico, Nano). Kernels with less in kernel mode like a Microkernel might have less architecture dependencies than a Monolithic Kernel?

What would be the architecture dependencies?

so far I have seen the following:
CPU, Context switch, Memory Management Unit (MMU), Clock/Timers, Trap, Interrupts, Device Registers, Device Addresses, Direct Memory Access (DMA), Spinlocks, and Basic input output system (BIOS).

[EDIT] Colours removed by Brendan[/EDIT]
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Re: What should be in the Hardware Abstraction Layer?

Post by thepowersgang »

(See my reply to your other thread for a comment on colours. Also, that signatue is an insult to my eyes)

To be honest, the "HAL" is kinda an iffy concept. For my code (runs on x86, amd64 and armv7) there are two "HAL"s. First is the processor / system layer which provides memory management, interrupts and timing. The next layer is the actual device drivers (USB, Display, PS2 keyboard, sound, ...) but they all have their own interface definition (although, devices of the same type will use the same interface - e.g. display adapters have a common API)

In essense, a monolithic kernel is a thick HAL with scheduling bundled with it. There is no one layer, there's many layers of differing thickness abstracting away from the hardware.
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Re: What should be in the Hardware Abstraction Layer?

Post by zeitue »

@thepowersgang thank you for the reply.
your HAL layer seams to contain the same thing that the rest of them do so I must be on the right track.
if the HAL is built in layers in a monolithic system would it be like this in a microkernel system?
having the base HAL in the microkernel, then having a layer of trusted driver severs above this as the second HAL?
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