microcode?

[Sam111]

Ok, I have been reading the chapters in the intel manuals on microcode and instruction processing.

I am curious to what extent microcode can do to a x86/64 bit cpu.

1) Are intel / cpu makers the only people that can physically create valid microcode updates for their processors?
(i.e so when using rdmrs ,wrmrs asm microcode update commands will have a valid checksum )

2) To what extent can microcode effect a cpu ?
For example could a microcode update be used to create a new asm instruction?
Could it be used to change the way protected mode security works (i.e bypass protected mode or create a different mode all together )

3) What other uses are their for updating microcode other then the rare occasion in history to fix a processor bug like foof bug?

4) Is it possible to update microcode in a way to give an old computer in features like for example SSE 4 if it only has SSE 3 and MMX.
I would think it is possible to create new instructions your still limited to the hardware so if you don't have a particular sized xmms register then you won't beable to update.

not much is available on how to develop microcode or if it is even possible , what it is full functionality can do...etc

I know bios updates or revisioning can provide new bios interrupt functions and features like booting from usb ,...etc (even fix 8GB barrier old bios problems)

Since microcode can be thought of firmware for the cpu instead of the bios it would stand to reason that microcode can be used to create new opcodes, asm instructions, and other features...

Curious if anybody knows more about it?

[Combuster]

Curious if anybody knows more about it?

That there is no reason at all to bother with it.

[Sam111]

That really doesn't answer the questions now does it?

[linguofreak]

Ok, I have been reading the chapters in the intel manuals on microcode and instruction processing.

I am curious to what extent microcode can do to a x86/64 bit cpu.

1) Are intel / cpu makers the only people that can physically create valid microcode updates for their processors?
(i.e so when using rdmrs ,wrmrs asm microcode update commands will have a valid checksum )

This is going to be highly dependent on the design of the chip and the goodwill of the manufacturer. For pretty much any x86-compatible chip, I'm almost certain the answer is "yes". Even if it's theoretically possible for a third party to create a valid microcode update (i.e, if the checksum is calculated by a well-documented algorithm that doesn't depend on a signing key or anything), I've never seen any documentation of the actual structure of the microcode for any mass-produced processor, and there's no guarantee that two processor models implementing the same instruction set will use the same microcode to do it. In short, writing your own microcode for an x86 processor would involve first finding out how the microcode mechanism on that processor worked by trial and error, and likely wouldn't be worth your time.

2) To what extent can microcode effect a cpu ?
For example could a microcode update be used to create a new asm instruction?
Could it be used to change the way protected mode security works (i.e bypass protected mode or create a different mode all together )

Once again, it depends entirely on how the CPU has been designed. Yes, it is in theory possible to edit a processor's microcode to add an ASM instruction. Depending on the design of the processor, however, it could be the case that all useful instructions that could be implemented are implemented in the existing microcode (or not).

3) What other uses are their for updating microcode other then the rare occasion in history to fix a processor bug like foof bug?

Once again, it depends entirely on the design of the processor.

4) Is it possible to update microcode in a way to give an old computer in features like for example SSE 4 if it only has SSE 3 and MMX.

See above.

I would think it is possible to create new instructions your still limited to the hardware so if you don't have a particular sized xmms register then you won't beable to update.

Indeed. The registers you have available will be one factor determining how much you can change with microcode.

not much is available on how to develop microcode or if it is even possible , what it is full functionality can do...etc

For pretty much any commercial processor, it's not possible. CPU manufacturers tend to be secretive about how they implement their designs to prevent their competitors from making clones.

I know bios updates or revisioning can provide new bios interrupt functions and features like booting from usb ,...etc (even fix 8GB barrier old bios problems)

Since microcode can be thought of firmware for the cpu instead of the bios it would stand to reason that microcode can be used to create new opcodes, asm instructions, and other features...

In theory, yes. But even BIOS tends to be a binary blob that the user doesn't really get to hack at. Microcode is even hairier to develop, to the point of utter impossibility, unless you design and build your own CPU. (I do know of at least one instance where somebody designed his own CPU and documented the microcode, so you could in theory design new microcode for that design, but it was handbuilt using wire-wrapped TTL and doesn't perform much better than the original IBM PC, so you'd have to build your own copy, and your phone would run circles around it performance-wise).

[MasterLee]

You may look at /arch/i386/kernel/microcode.c for calculation of the checksum.

[bluemoon]

To OP, you seems confused machine code to micro-op translation with the available micro-ops itself.
While you may reprogram (part of) the translation for some processor, but you usually cannot add new micro-op.

For adding new instruction it involve enlarging the translation table, which is an implementation detail.

And what can you do with it? I would say RTF(full)M for your target processor. It tells you what can be reprogrammed, or whether you may add new instruction.

[brain]

To be honest if i could change the microcode of my cpu, i would be worried about the change being permanent. Much like flashing a bios, you could turn your expensive cpu into a piece of scrap silicon with very little chance of recovery. A scary prospect!

[MasterLee]

To be honest if i could change the microcode of my cpu, i would be worried about the change being permanent. Much like flashing a bios, you could turn your expensive cpu into a piece of scrap silicon with very little chance of recovery. A scary prospect!

You can find the following in the documentation of microcode.ctl:

The microcode update is volatile and needs to be uploaded on each system boot i.e. it doesn't reflash your cpu permanently, reboot and it reverts back to the old microcode.

[Sam111]

Code: Select all

To OP, you seems confused machine code to micro-op translation with the available micro-ops itself.
While you may reprogram (part of) the translation for some processor, but you usually cannot add new micro-op.

For adding new instruction it involve enlarging the translation table, which is an implementation detail.

Yes , that is my problem.

In theory , the opcodes/asm instructions tell the cpu what to do.
So why do we even need the micro-code in the cpu? Couldn't you just hardwire all the instructions so that when an instruction is executed it automatically is executed with no middle man microcode involved.

I guess what is the point of having micro-code is it just to aid in the complexity of hardwiring every instruction.

I know that for x86 we have at most 512 different possible opcodes. This corresponds to 1byte opcode = 2^8 = 256 possible states, times 2 for the second byte possible situation.

so would it be much harder to not use microcode at all?

Also is microcode the thing that is used to control the mode of operation like protected , real mode ,...etc

Or are the functionality of the modes hardwired and not dependent of any microcode.
I guess all this would be dependent of how the processor was designed but I think the microcode would have to be used if you had a complex process or with pipelining , cache ,...etc

Seems to me the only way to use cache L1 , L2 ,...etc algorithms is to program this into some type of microcode/firmware of the cpu and not have it hardwired. Correct me if I am wrong but it seems that cache mechanism , pipelining mechanism , modes,...etc must depend mostly on internal microcode as opposed to being all hardwired.

I guess my issue is I don't know how microcode truely works in a processor.
Like when the eip point to some code to execute , fetchs ,...etc where in the process is the microcodes begining . Or where is it contained in the processor.

For example I have programmed AVR chips before. And got a little bit into how a bios chip is programmed / flashed. So I kind of know how a bios fully works (leaving out the cpu of the bios and weather it has microcode which I think all avr chips are pretty much hardwired (i.e no microcode in the cpu of the avr chips but could be wrong))

[Solar]

So why do we even need the micro-code in the cpu?

I could write a lengthy text explaining it to you here.

Or you could go and read about it.