HOW TO generate R_X86_64_64 relocations with yasm/nasm

[daveATseclogs]

Hi there i have a question,
i'm porting my "OS" to x86-64. How i can generate a relocation of type R_X86_64_64 for external symbols?!

for example if i have defined the gdt in another file this instruction:

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extern gdtr
lgdt     [gdtr]

generates a R_X86_64_32 relocation for the gdtr symbol. It's not correct since the pointers must be 64 bits and the address will be truncated.

I assemble in elf64...

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$> yasm -f elf64 test.asm
$> objdump --reloc test.o
000000000000002b R_X86_64_32       gdtd

If i do like this then a 64 bit reloc is generated and the gdtd address is not truncated:

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extern gdtr
mov    rax, gdtr
lgdt     [rax]

There is another way to tell yasm/nasm to generate a 64 bit relocation directly for the gdtr symbol?!

Thanks a lot
Dave

[jnc100]

The problem is not with yasm, it is that the lgdt instruction specifies the location of its operand in a ModR/M byte. If you are simply using a memory address then this is equivalent to a simple displacement (without a base). The ModR/M / SIB combo only allows 32 bit displacements, thus you will only generate 32 bit relocations. The way you are doing it with MOV is the only way to encode 64 bit immediates as far as I know. It works because there is a MOV r64, imm64 instruction.

Regards,
John.

[daveATseclogs]

Thanks man

[Owen]

...Hence why everyone places their kernel binary in the -2GB region of the address space. This region is where said 32-bit 0-offset signed displacements work

[turdus]

The ModR/M / SIB combo only allows 32 bit displacements, thus you will only generate 32 bit relocations. The way you are doing it with MOV is the only way to encode 64 bit immediates as far as I know. It works because there is a MOV r64, imm64 instruction.

Regards,
John.

Right about modrm, but there’s only MOV rax, imm64. Other registers are sign extended from imm32.

[jnc100]

Right about modrm, but there’s only MOV rax, imm64. Other registers are sign extended from imm32.

My copy of Intel 2A has MOV r64, imm64 encoded as rex.w + b8 + rd, described as "move imm64 to r64".

Regards,
John.

[turdus]

My copy of Intel 2A has MOV r64, imm64 encoded as rex.w + b8 + rd, described as "move imm64 to r64".

Yep, you're right, I was misleaded by the example and the first sentence in 2.2.1.5 (same document). Gosh, if I would read more carefully, I would not have been sucking with using only the accumulator for 64 bit immediates in isrs...