Higher half kernel questions

[DrMcKay]

Hi! I've read some articles about higher half kernel, but I still don't understand one thing: I'll have my kernel mapped to some virtual address far, far away. But it will still reside in physical memory, wherever my bootloader loads him. Higher_Half_Kernel says:

More generically, user applications are not dependent on how many memory is kernel space (Your application can be linked to 0x400000 regardless of whether kernel is at 0xC0000000, 0x80000000 or 0xE0000000 ...), which makes ABI's nicer.

So (as following my way of thinking), I'll also have to map 0x400000 to some physical address, after physical memory, which is taken by kernel. But, I could do that while having only paging enabled. So, my question is: did I miss something, or doesn't kernel memory mapping have anything to do with mapping memory for other processes?

[serge2k]

I believe what it is saying is that your user applications can just be mapped to 0x400000 without caring how much memory the kernel is taking up.

If you put the kernel at 0x100000 and it took up all the the memory until 0x401000 (for example) then it would interfere with a user process you want to load at 0x400000.

Using a higher half kernel avoids this by just loading the kernel in a higher part of the virtual address space.

Not sure if that helps, I'm a bit confused as to what your question is.

[gerryg400]

or doesn't kernel memory mapping have anything to do with mapping memory for other processes?

Basically they are the same. There is only one current memory map or context. The current process will be in the lower half and the kernel will be in the upper half. When you switch to another process memory map (by reloading cr3 on Intel) the mappings in the lower half will point to the new process. But the mappings in the upper half of every process will point to the physical memory that contains the kernel.

Each process needs to have its own cr3 and own pagetables/pagedirs etc. BUT some of the table entries are common to every process. To give a concrete example on i386 you might have this

Code: Select all

For process A
pgdirA[0] points to pagetables to map 1st 4M of process A memory at linear address 0000 0000
pgdirA[1] points to pagetables to map 2nd 4M of process A memory at linear address 0040 0000
pgdirA[2] points to pagetables to map 3nd 4M of process A memory at linear address 0080 0000
etc.

pgdirA[768] points to pagetables to map 1st 4M of kernel memory at linear address c000 0000
pgdirA[769] points to pagetables to map 2nd 4M of kernel memory at linear address c040 0000

For process B
pgdirB[0] points to pagetables to map 1st 4M of process B memory at linear address 0000 0000
pgdirB[1] points to pagetables to map 2nd 4M of process B memory at linear address 0040 0000
pgdirB[2] points to pagetables to map 3nd 4M of process B memory at linear address 0080 0000
etc.

pgdirB[768] points to pagetables to map 1st 4M of kernel memory at linear address c000 0000
pgdirB[769] points to pagetables to map 2nd 4M of kernel memory at linear address c040 0000

pdgirA[0] != pdgirB[0]
pdgirA[1] != pdgirB[1]
pdgirA[2] != pdgirB[2]

BUT
pdgirA[768] == pdgirB[768]
pdgirA[769] == pdgirB[769]

The result is that whenever cr3 is reloaded, the current process will be in the lower half and the kernel in the upper half.

[skyking]

I don't think higher half makes much sense if you don't enable paging. Also note that without paging you can't put every process at the same logical address (well you could, but it would be suboptimal).

[DrMcKay]

OK, now I get it (I just couldn't understand, how may process\kernel memory be related in the way Wiki described it), thanks very much guys !

[homer5439]

Code: Select all

For process A
pgdirA[0] points to pagetables to map 1st 4M of process A memory at linear address 0000 0000
pgdirA[1] points to pagetables to map 2nd 4M of process A memory at linear address 0040 0000
pgdirA[2] points to pagetables to map 3nd 4M of process A memory at linear address 0080 0000
etc.

pgdirA[768] points to pagetables to map 1st 4M of kernel memory at linear address c000 0000
pgdirA[769] points to pagetables to map 2nd 4M of kernel memory at linear address c040 0000

For process B
pgdirB[0] points to pagetables to map 1st 4M of process B memory at linear address 0000 0000
pgdirB[1] points to pagetables to map 2nd 4M of process B memory at linear address 0040 0000
pgdirB[2] points to pagetables to map 3nd 4M of process B memory at linear address 0080 0000
etc.

pgdirB[768] points to pagetables to map 1st 4M of kernel memory at linear address c000 0000
pgdirB[769] points to pagetables to map 2nd 4M of kernel memory at linear address c040 0000

pdgirA[0] != pdgirB[0]
pdgirA[1] != pdgirB[1]
pdgirA[2] != pdgirB[2]

BUT
pdgirA[768] == pdgirB[768]
pdgirA[769] == pdgirB[769]

The result is that whenever cr3 is reloaded, the current process will be in the lower half and the kernel in the upper half.

I think you meant to map process B low addresses to different addresses from A?

eg

Code: Select all

pgdirB[0] points to pagetables to map 1st 4M of process B memory at linear address 1000 0000
pgdirB[1] points to pagetables to map 2nd 4M of process B memory at linear address 1040 0000
pgdirB[2] points to pagetables to map 3nd 4M of process B memory at linear address 1080 0000

etc.

[gerryg400]

I think you meant to map process B low addresses to different addresses from A?

eg

Code: Select all

pgdirB[0] points to pagetables to map 1st 4M of process B memory at linear address 1000 0000
pgdirB[1] points to pagetables to map 2nd 4M of process B memory at linear address 1040 0000
pgdirB[2] points to pagetables to map 3nd 4M of process B memory at linear address 1080 0000

etc.

No I didn't. The point is that every process lives at the same linear address. But every process lives in a separate memory context created from different physical pages.