How do I use segmentation and paging together?

[NAT682]

My memory model uses both segmentation and paging, so my question is - Do I need to implement paging first and use the paged addresses in the GDT? Or implement segmentation first, use linear addresses for the page directory/tables, and address it using segmentation? Or something else? Or is my idea completely insane and will never work? I would like to address the memory using segmentation, however I believe x86-64 does not have segmentation.

Also, do I really have to set up the entire page directory and page tables? That is a total of about a million page table entries (with 4 kB pages)! And would a series of mov statements be the best way to load a GDT, IDT, and page directory/tables in Assembly?

When responding, please note that my primary computer language is Assembly, with C and FreeBASIC as secondary languages.

[Kitsune]

I would like to address the memory using segmentation, however I believe x86-64 does not have segmentation.

X86-64 does indeed not support segmentation.

Also, do I really have to set up the entire page directory and page tables? That is a total of about a million page table entries (with 4 kB pages)!

If you mark a page table as 'not present', then you don't have to setup the page entries for that table, which'll save you some space. Also, if you're mapping your kernel into the all of your address spaces, you can use the same page tables for the kernel in all the address spaces to save a little bit of memory (which'd also make it a whole lot easier to adjust the kernel's section of the address space).

[xenos]

Do I need to implement paging first and use the paged addresses in the GDT?

I recomment you look at the Intel Manuals, mainly the sections about memory addressing. Basically, the answer is yes. Memory address translation takes two steps:

The first step is segmentation. An address of the type segment:offset is translated to a virtual (or linear) address by adding the offset to segment base (from the GDT). The resulting address, as well as the segment base, are part of the virtual address space.

The second step is paging. The virtual address is something like a pointer into the page table. The page table contains the corresponding physical address, i.e. the address that is finally used when accessing physical RAM. These addresses belong to the physical address space.

[nedbrek]

Long ago, I looked into using segmentation as a way to access 64 bits of address space from 32 bit processes... now, I'd just say go 64 bit and be done

The relevant wiki page is:
http://wiki.osdev.org/Segmentation#Protected_Mode

64bit mode ignores segment limits. Also, the base offsets in CS,SS,DS, and ES are ignored. The segments offsets loaded into FS and GS are used. I believe Windows uses this for TLS or accessing user data from the kernel or something.


How are you going to be generating code? Are you adopting the tiny/small/compact/medium/large/huge models? Mmm, DOS!

[NAT682]

X86-64 does indeed not support segmentation.

Even when it's running in IA-32 mode, i.e. not in long mode? If so, how do I get paging to do segmentation's job, for example, using a certain protection ring for code that is running in it? Do I still have to set up a GDT in x64 if there's no segmentation, therefore no real use for a GDT (I can use CPUID to detect if the CPU is x64)?

[NickJohnson]

If it's running in protected mode, not long mode, it acts exactly like any 32-bit x86 processor, so you can and must (by having a GDT) use segmentation if you're not in long mode. Paging in long mode has its own protection scheme, just like paging in protected mode, which is separate from segmentation. You can always tell if you are in long or protected mode, because you set it that way, so you will know when you need a GDT.

[xenos]

In long mode you will also need a GDT to implement multitasking in PL3. You need at least one TSS per CPU, which stores, for example, the PL0 stack pointer, which is loaded into RSP when an interrupt occurs while you are running in PL3.

[rdos]

Segmentation will setup linear addresses, and those linear addresses are then paged to physical addresses by the paging hardware through the page tables the OS sets up. Also observe that real-mode (DOS) segmentation is not the same as protected mode segmentation. In real mode, the segment part is just shifted 4 bits to the left, while in protected mode each segment (selector) can have any base and size. In order to run real mode code, you need to enable V86 (Virtual 86) mode in protected mode.