E9 7500myk wrote:I also think I'm seeing an issue with eIP getting off by one after an IRET. I need to look into it more, but it seems like after I handle an interrupt I get a bunch of garbage instructions until the CPU crashes.
Edit: I take that back, it seems to be fine after IRET, somewhere the IP is getting off though...
Edit2: I think I found whats happening.
In the ASM I have a JMP to address 0x0BDC
After executing the instruction, eIP is 0xBDB so I guess we're subtracting when we shouldnt?
Ok, here's the instruction that it's having issues with
Opcode: E97500
According to microsoft's debug this is a JMP 0BDC
current eIP is 0x0B64
So, 0x75 is our offset to the next instruction, 0x0B64 + 0x75 gives us 0xBD9
In jmp16_near16 we do the add, then ++ eip, so now we're at 0xBDA. Next cycle goes around, add 1, we have 0xBDB, we need +1 to get to the right instruction at 0xBDC
Now I know that Jmp16_near16 happens all the time so why is it this one time it's messing up? The actual assembly is just a Jump to a label so it shouldn't be that big of a deal...
would be jump EIP+0x0075.. hmm..
well, I must ask. Why are you using a rel16 jmp when it will fit in a rel8? assembler bug? lol
but I'm trying to duplicate this bug, I think adding a simple eip++ fixes it. Maybe the reason it has gone unnoticed is because rel8 is usually used and the rm/16 and such jmp functions don't use the relative code I have.
one question. Have you any idea what a jmp relative 0 would do? would it jmp ahead none and therefore just go to the next instruction? or would it cause an infinite loop? hmm..