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I'm sorry if this has already been asked, but the search result page won't load ::) and trawling through over 100 pages of forums on a 56k ain't my idea of fun.

Anyhow, I was following Tim Robinson's excellent memory management tutorial, with the Intel System Programming Guide at my side, and I came across his mention of changing the segment base address to map the kernel elsewhere, so I opened the Intel guide looking for information on this, but it seemed to have missed it out.

Well, what I am wondering is, what is the syntax for the LGDT and SGDT instructions, and what registers are suitable as they seem to return 48-bit numbers? Also, what happens when you change the segment base address in the middle of the code? (frankly, is it safe?).

I don't know if I am being obtuse or have missed something, but do segmented addressed work in a similar manner to paged addresses (segment selector | offset) or have I grabbed the wrong end of the stick entirely? (maybe the manual is perfectly clear but I just am not equiped to understand it ??? ).

P.S. Sorry for all the questions. They may be obvious, but my brain is still mush from exams.

P.P.S Thanks to Tim Robinson for the tutorials.

- the argument for LGDT and SGDT is the effective address of a 48-bit memory region that will hold the limit and base of the GDT. That means that when using "sgdt [eax]", what you actually do is giving in eax the offset (in DS) of a 6-bytes memory array that will receive the content of the GDTR.

- you should take care, when reloading the GDT, that the new GDT's content will be committed to segment register by reloading their contents (like push DS; pop DS), so that the base, limit, type, etc. are reloaded in the shadowed part of the segment register.

Thanks for the quick answer.

Ah, pointers then. Just my favourite.

Hi,

Fraser Gordon wrote: Also, what happens when you change the segment base address in the middle of the code? (frankly, is it safe?).

Yes - it is safe as long as you're careful. You can disable interrupts, fill the GDT, IDT and LDT (if any) with zeros (or anything else) and it won't matter until you enable interrupts, try to load a segment register or use the GDT/LDT/IDT entries in any way.

When you load a segment register (e.g. 'mov ds,ax') it copies the segment's base and limit into a hidden part of the segment register. The CPU then uses this hidden part while ignoring the values in the GDT.


Cheers,

Brendan