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hi

i am developing an os as a college project..i have 25 days 2 submission....
this is what i have done.....
switched to pmode
set up gdt,idt,etc...
init apic
completed mem mngmt
i have also setup a basic task using ltr..
file system is in progress...my teammate is doing it...

now i am trouble with multitasking....
i am using the TSS based MT...now the problem is i do not know how to switch from ring0 to ring 3...i have tried the IRET method as well as the call gate return method...in both cases i think there is a problem regarding SS....i am using VMWARE which generates an error(Stack Error or something) when i try switching as above...also i tried switching from ring 0 to ring 2...this works somewhat in the sense that the transition is made but it also gives the same error after sometime....i have checked out the example in myexecpc...without much success....please help...if anyone could plz gimme a code written in nasm for which can boot(basic os)....which also jumps from ring0 to ring3 would be very helpful......

i have another problem...
i have init the apic...now the clock interrupt no 32 is being generated but the interrupt no. 33 is not being generate when i press a key on the keyboard...plz help...

thnx
aks

Hi,

aks wrote: i am developing an os as a college project..i have 25 days 2 submission....

25 days left? Good luck

now i am trouble with multitasking....
i am using the TSS based MT...now the problem is i do not know how to switch from ring0 to ring 3...i have tried the IRET method as well as the call gate return method...in both cases i think there is a problem regarding SS.

I use the IRET method & it works fine. What is wrong with SS (and/or the ESP which should also be on the CPL0 stack)?
You could make all threads CPL=0 and skip it Also this shouldn't need to be done during task switches (only when a new user level task is created). The user level code enters the kernel (via interrupt or API call) then the kernel switches tasks, then the kernel code returns in the usual way (IRET or RETF depending on how the user level code got into the kernel/CPL=0). I usually write the scheduler to handle CPL=0 to CPL=0 task switches only, and add user level threads later.

i have another problem...
i have init the apic...now the clock interrupt no 32 is being generated but the interrupt no. 33 is not being generate when i press a key on the keyboard...plz help...

I'd recommend downloading BOCHS and enabling the APIC debug information (BOCHS can report everything that happens to/with the IO APIC). I'm haven't used VMWARE so I don't know if it can do this.

I actually had a fair bit of trouble setting up APICs because the PIT timer continues to trigger interrupts that are queued in the CPU when interrupts are disabled. To avoid this you have to be careful how you disable interrupts. I mask all PIC IRQs and all APIC interrupts, but I never actually use "CLI". This prevents IRQs from being queued. I was using CLI but when the APIC is first programmed I got stale/old/queued IRQs that where originally sent by the PIC (IRQs 0, 1 and 6). Linux has a big hack to flush the stale IRQs instead.

I'd skip the IO APIC chips. In order to set them up correctly you need to parse ACPI and/or MP specification data tables (and handle the cases where this information is wrong). It's simple to remap the PIC, and there's no real advantage in using the APICs unless you plan on supporting SMP (not recommended with the time you have left). Also the PIT timer IRQ isn't connected to the APIC at all on some (older) MP motherboards. I use RTC periodic interrupt (IRQ 8 ) instead. Linux has a large/complex hack that routes the PIC interrupt through the APIC when the motherboard doesn't connect the PIT to the APIC directly.

Cheers,

Brendan

aks wrote: i am using the TSS based MT...now the problem is i do not know how to switch from ring0 to ring 3...i have tried the IRET method as well as the call gate return method...

only the 'IRET ' method has chances to work...
Make sure you loaded a valid TSS into LTR and that this TSS has SS0 and ESP0 loaded with the address of a 'system-call handling stack' before you try to gain ring 3.

i have init the apic...now the clock interrupt no 32 is being generated but the interrupt no. 33 is not being generate when i press a key on the keyb help...

This looks like you've misprogramming the PIC. get a look at the WikiFAQ

yes i have set the ss0 and esp0 of the task to a valid system call handling stack(basically a ring0 stack right?).this segment is in the ldt within that of the process. plz help.....

also could someone help with the problem related to the fact that ring2 can be shifted to but not ring3....

thnx
aks

do you have paging enabled ? Ring2 is still "supervisor code" considering paging protection, while Ring3 is "user code". Therefore your pages must have the "U" bit enabled for user code to access them ...

hi yes paging is enabled and in user mode.....but i dont see why a GP fault is not being generated....
plz help
thnx
aks

imho, the best you can do to help yourself is to collect more information about the crash (at what address does it occur ? what are the registers content at that moment, and what does it tell you about the state of the faulty function ...)

could u plz tell me how to check the register contents since it crashes during an iret statement..(i think during the loading of the ss3 register)...plz help....i m dead else....
i have checked the tss properly...
can anyone gimme a copy of the ring3 tss structure...basically the segment reg contents(cs,ds,ss,ss0,ss1,ss2)...i have all these values with rpl 3 other than ss0,ss1,ss2....obviously.....
also the cs and ss value pushed oonto the stack before iret has the rpl set to 3....
thnx
aks

i would try my code in BOCHS if i were you ... it produce helpful reports on CPU panics ...

Brendan's code should work fine, as far as i can tell.

well, firstly use Bochs if your problem seems very rooted then try bochs debugger, it is easy to use. Use only two levels of protection (ring0 and ring3) if its alright, if I were you I would keep things simple by firstly trying to do a task switch to user from kernel. Also If you could post some code it would be easier to help. Good luck.

thnx all
i solved both my probs...
there was problem with paging....
bye