Hi
For a normal flat addressing paged pmode operating system, do I need TSS segments, if I do, what are they needed for.
Thanks
srg
Task State Segment
Re:Task State Segment
Since AMD put on the thinking cap you don't explicitly NEED it, but if you want to support more than AMD64 computers (you probably do) you do. At least one for switching CPLs in software (on interrupts, if you use SYSCALL/SYSENTER). They hold the ESP values for all cpl's.srg wrote: For a normal flat addressing paged pmode operating system, do I need TSS segments, if I do, what are they needed for.
Re:Task State Segment
Well at the moment I'm thinking in terms of normal protected mode (My OS is designed for 386 or better, the AMD64 support will come later).
As for portability, I'm assuming other architectures don't use TSSs.
As for portability, I'm assuming other architectures don't use TSSs.
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Re:Task State Segment
one TSS is mandatory as soon as you want to give control to non-priviledged code on 386+. period. Others architectures may not have TSS so they won't need that. But even when you come to the stack switching technique, i doubt all the architecture will have the same stack frame design and so the code will be architecture-specific aswell ...