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Hello evrybody !

I'm still reading tutorials, and there is something which isn't clean yet in my mind ! (if only it was the only thing confused ! )

Well, to be able to access the memory over 1MB, I'm to enter in Pmode. For that, I must define a GDT with code and data segment. But if I want to use paging ? I enable paging, and what ? I've access to the whole memory ? So what is the utility of segments in my GDT ???

Really, it's confused in my brain !!!
I understand that segment permit different kind of accesses to the memory (I believe). For exemple, a code segment to execute code, and a data to read in memory ?

Is there the same idea with paging ?

So, if segments in my GDT are not used any more, why somme OS have generaly 2 code segments and to data segements (one of each for a different dpl) ?

Because of that, I asked myself if I had to "cut" my code segement, and my data segment into pages ??


In addition to that, I have another question (not really related to the same topic...)
If I have some code at a certain address of a code segment, Would I be able to see the code frome a data segment (using the same address, or rather offset) ?

Thanks for your help !

you must have GDT and segments because IA32 says so. If you have no code descriptor, you cannot fill CS and therefore cannot reach an instruction. If you don't mind about segments, just turn to flat addressing: code and data segments of 4GB starting at offset 0. This is basically the way to "disable" segmentation.

as for the second question, yes, you can "see" your code segment through a data segment (and even modify it) without offsets adjustments provided that both segments have the same base and data.limit>=code.limit ...

What distubs me is the way of using paging...
If I use paging, I forgot the segmentation ?
Because I saw in many OS that there were for exemple a code segment for the kernel, and a code segment for the user... It's necessary useful... But how to combine paging with this ?

For me paging totaly hides segmentation...
It is just to cut memory frome 0 to 4GB into chunks of 4kb...

Thanks Pype.Cliker !

Silverhawk wrote: What distubs me is the way of using paging...
If I use paging, I forgot the segmentation ?

Not necessarily.

The thing is, the IA32 segmented memory concept is pretty peculiar, and most OS designers don't really care for it. So they set the segments to cover all the 2^32 bytes of addressable RAM, and just forget about them.

Let's say you have an address in your pmode code. First that's tunneled through the segment system to result in a linear address. Then the paging (if enabled) turns that linear address into a physical address.

Now, if the segments all go from 0 to 2^32 - 1, every segmented address translates 1:1 to a linear address - effectively you have disabled segmentation.

That isn't to say you cannot use segments and pages in parallel. It's just more difficult.

What Solar said.

Paging doesn't cover up segmentation. In fact, segmentation is applied on top of paging. Segmentation is always there, but like Solar said, if you don't want to use it, just set your code and data segments to cover the full address space, and forget about them.

Normally, with paging turned off, segmentation (your selectors and offsets) translate directly into physical addresses in RAM. The only difference with paging turned on is that segmentation now translates into linear addresses instead of physical addresses. Linear addresses are virtual, and can be anywhere within the 4GB address space, regardless of how much RAM you actually have. Paging will then translate these linear addresses into the correct physical addresses as you have them setup.

So paging just adds another layer, it doesn't cover up or really change segmentation much.

Thanks to Solar and Nairou !!

It's a little bit more clear in my head )
I will try to design a memory framework for a simple kernel...