notice anything wrong here?

[libber]

alright, i have been trying to setup the idt for about 2 weeks now and i am completley stumpted. i have decompiled the way c kernels do it and tried to emulate that. i have followed every idt-related guide at osdev.neopages.net (mainly involved stuffing the idt in .data and making sure the address to the handler was correct), i at one point had tons of interrupts filling every part of the idt and nothing changed, i have tried to sortof brute-force this problem by trying every combination of things i can. also i reread the part in intel book 3 about interrupts but it still doesnt work. this fails in both bochs and on a real pc, so it is definetly my problem. i mean, i really cant see how i am doing something wrong with the idt, i mean it is just an array pointing to handlers, which you then load a pointer to, but i dont know

any commentary is appreciated, even if it doesnt help me fix the idt (although that would be much *more* appreciated :) ).

thanks for your time,
Collin



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[Pype.Clicker]

sounds good but i'd need to know the base of your DS segment to be 100% affirmative...

[libber]

oh, sorry data segment is offset 0x10 in the gdt. so you really dont see anything suspicious? oh how will i ever catch this error... :/

thanks for your time,
Collin

[Pype.Clicker]

nah! that was not what i asked for ... i meant *base* of the segment, not its selector ... if your base is not 0, it means that the IDTR.base value may not be used as a pointer to the IDT from %DS ...

[libber]

ah sorry, yes its base is 0. to firther clarify here is my bootloader also

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[Candy]

you're not scaling the IDT offset address

suppose you add ISR 0, then 1

you then use offsets ISR_BASE and ISR_BASE + 1, obviously ISR1 is overwriting the entry for ISR0.

add an shl eax, 3 before the add to edx, then you're set.