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IDT and virtual memory
Posted: Tue Jul 29, 2003 1:56 am
by Mr_Spam
I'm having alot of problem getting my IDT to work with virtual memory. It usually always #GP's (general protection faults) or occationaly I get a pagefault. I have seem to found a large lack of documents descrbiing how the IDT reacts with VM, and weather virtual or physical address shall be used. Ive tried both, and combinations of both but it never works. the Intel manualls dont help much either
.
thanks!
Re:IDT and virtual memory
Posted: Tue Jul 29, 2003 2:05 am
by distantvoices
Hm.
I use virtual adresses for all my idt and gdt stuff and it works with out problems.
The question is rather: *how* do you do it? How do you link your code. To which adress do you link it? when do you set up paging? (I set up paging *before* even touching IDT or GDT stuff).
Re:IDT and virtual memory
Posted: Tue Jul 29, 2003 3:26 am
by Pype.Clicker
of course, if your "page fault" exception descriptor is on a missing page, you're likely to have system crash...
Re:IDT and virtual memory
Posted: Wed Jul 30, 2003 2:32 am
by Mr_Spam
I turned off paging and i still get #GP so i think its something other than paging/virtual memory. here is my IDT code if you guys happen to see whats wrong.
Code: Select all
mov word [IDTR.Offset], (256*8)-1 ; size of the IDT
Code: Select all
CreateIDT:
mov eax, (256*8) ; size of the IDT, we need to allocate in the kernels heap
call kmalloc ; allocate the space needed for the IDT
mov dword [IDTR.Offset], eax ; set the offset address of the IDT in the IDT pointer
mov ecx, 255 ; number of entries in the IDT1-1
mov edx, IntQ ; ISR address is in edx
mov ebx, edx ; copy the value of edx to eax
shr ebx, 16 ; shift bits 16 to the right
.loop:
mov word [eax], dx ; low byte of the isr address
mov word [eax+2], 0x0008 ; selector
mov word [eax+4], 0x8E00 ; stats
mov word [eax+6], bx ; high byte of the isr address
add eax, 8 ; address of next entry
loop .loop ; make next entry
lidt [IDTR] ; load the IDT register
InitPgTblChain:
int 0x20 ; #GP here
and finaly
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IDTR
.Limit dw 0
.Offset dd 0
IDTR_END
some of my comments are off because ive been swicthing around registers being used for various tasks.
thanks,
mr_spam
Re:IDT and virtual memory
Posted: Wed Jul 30, 2003 4:10 am
by Pype.Clicker
hum, maybe
Code: Select all
mov word [IDTR.Offset], (256*8)-1 ; size of the IDT
should become
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mov word [IDTR.Limit], (256*8)-1 ; size of the IDT
looks like being coded past 2AM ;D
Re:IDT and virtual memory
Posted: Wed Jul 30, 2003 5:15 am
by mystran
IIRC IDTR holds the "linear" address of IDT, which is to say, the virtual address after any segmentation is resolved. If you are not using segmentation, just use the virtual address.
Like, there are three different addresses on IA-32. There is the virtual address, which is what a process sees. Then there's the linear address, which is virtual address plus the segment base address, and then there's physical address.
Now with a flat memory model (segment base 0, limit 4GB) linear and virtual address are exactly the same thing. It seems even some docs in the Net confuse these three different addresses so in some places, linear address might mean something else.
This naming convention I described is what Intel uses.
This applies to GDT and LDT as well, IIRC. So you could have a different GDT for each process by mapping different physical pages to the same linear address in different processes.
Re:IDT and virtual memory
Posted: Wed Jul 30, 2003 6:22 pm
by Mr_Spam
thanks! i cant belive i missed something so obvious. i fixed that an now it page faults! i think thats a step in a good direction.