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IRQ #0 disables interrupts?
Posted: Tue Jun 03, 2003 5:14 pm
by nullify
Currently, I need to add support for a sleep( ) function to supplement a floppy driver I have nearly complete. After programming the PIT, registering a handler with the IDT and unmasking IRQ #0, the timer ISR gets called exactly once. I noted that other interrupts (e.g, keyboard) stopped working also. I tried adding a STI instruction in the timer ISR, and that seems to resolve the problem.
However, I suspect this is probably not normal behavior for IRQ #0 to disable interrupts? If it isn't, what possibly could yield such behavior (i.e., where am I going wrong) ?
- nullify
P.S. My timer ISR resembles the following :
Code: Select all
__asm__
(
".text\n"
".globl timer_wrap\n"
"timer_wrap:\n"
"pusha\n"
"call timer_isr\n"
"popa\n"
"iret\n"
);
void timer_isr(void)
{
kprintf("irq0 ");
outb(0x20, 0x20);
}
Re:IRQ #0 disables interrupts?
Posted: Tue Jun 03, 2003 6:05 pm
by Tim
Come on, this is basic x86 architecture knowlege!
When the CPU executes an interrupt, it does the following:
(-- pushes SS and ESP if a ring change is involved)
-- pushes EFLAGS
-- clears EFLAGS.IF (i.e. does a CLI instruction)
-- pushes CS and EIP
So interrupts are always disabled at the CPU until you do an IRET or an STI. Additionally, the PIC won't give you any more lower-priority interrupts until you give it an EOI.
Re:IRQ #0 disables interrupts?
Posted: Tue Jun 03, 2003 7:20 pm
by nullify
I apologize, but I am undertaking operating system development purely as a hobby to learn about x86 architecture, and I have taken no formal courses or anything like that.
That said, I believe you may have mis-interpreted the problem I'm having, or perhaps I was unclear. The timer ISR ends with an IRET instruction, so interrupts should be enabled thereafter, because the original EFLAGS is restored. However, it isn't - interrupts remain disabled. To make matters even weirder, enabling interrupts in the timer ISR actually causes the whole thing to work properly, even though the original EFLAGS should be restored, overwriting the IF bit.
Additionally, I do send the end-of-interrupt signal to the PIC (my original post provides a code snippet that indicates so).
Re:IRQ #0 disables interrupts?
Posted: Wed Jun 04, 2003 2:47 pm
by nullify
Ah, never mind I discovered the cause. What happened was I was setting the C timer handler address in the IDT instead of the assembly wrapper! Sometimes, operating system development makes you feel so stupid
