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I am getting to the point that i need to setup an IDT, i made a generic interrupt handler aka Interrupt Service Routine (ISR). now i need to load the IDT with the location of this ISR, i am wondering the best way to do this. i thought of only one realistic way to do this

use linker script to load idt.asm (my interrupt handler) to 0x200000, that is the location i have decided upon.

this isnt really a bad solution assuming it works but i was looking at the IDTkernel, and example kernel to demostrate interrupts, and the compile script doesnt load the idt stuff as differnt and i am not sure how it works exactly, so i am wondering if i can setup the ISR to a specific location without any linker stuff.

also any tips you have reguarding the setup of interrupts, especially software interrupts, and any opinion about which should come first, interrupts or paging.

thanks for your time
libber

i don't really see why you absolutely want to load the IDT at a well-known address ... just put the address of your handler in your IDT descriptors and voil? (regardless of where it has been loaded).

i loaded my GDT at 0x500 linear but my IDT exists in memory with my kernel

hrm, mabey i am misunderstanding something, i dont care where IDT is located, i am wondering about how to setup the interrupt handlers (ISRs) at certain locations. when i load the IDT, part of each interrupt gate holds the offset into the segmet that is also part of the gate (pg 5-13 intel book 3) so i am wondering a good way of having a handler at a certain location, would having a seperate linking script be my best option?

for instance i have an interrupt gate like this

.data

IDT
dw 0xffff   ;offset(16b), first 16 of offset in segment
dw 0x8      ;segment selector (16b), offset in GDT of Code Segment.
db 00000000b   ;from the left, 3 bits that are always 0, then 5 reserved bits
db 10000110   ;P-flag (1b), set if ISR is present
      ;Signature (5b) to show that it is an Interrupt gate
      ;DPL (2b)
dw 0xf000   ;Offset part 2 (16b), the two offsets are added to get
      ; 1048576, or 1mb, so the interrupt service routine
      ; (ISR) will start at 1mb in CS
IDT_END   

so for instance there would i need to load my interrupts all in a row starting at 1mb then fill in the interrupt gates approprietly (interrupt handler 1 starts at offset 1mb, interrupt handler 2 (yea i know we leave 2 alone...) starts at 1mb + space_for_interrupt_handler_1 ) ?

also know 1mb is just an example offset

thanks for your time,
libber

libber wrote:hrm, mabey i am misunderstanding something, i dont care where IDT is located, i am wondering about how to setup the interrupt handlers (ISRs) at certain locations.

But why? You don't need to care where the routines are located, either.

interrupt handler 2 (yea i know we leave 2 alone...) starts at 1mb + space_for_interrupt_handler_1 ) ?

You can ignore IRQ 2, but not interrupt 2. IRQ 2 = interrupt 2 + (master PIC base).

i build my ISR/IDT at runtime..

build_isr(&routine_offset, intISRNumber);

something like that

that's a pretty unusual way of working... how can you tell in advance the size that the handlers will have ? If all this is intended to avoid the need for creating dynamically your IDT content, it seems wasting your efforts (imho).

The options i see to do what you wish are :

• put your handlers at the start of your kernel (just after the kernel _start if it has to be first). You know the first handler will be at (_start_done - _start) and you can make every handler having the same size with

  Code: Select all

  handler_XYZ:
      pushad
      ...
      popad
      iretd
  align <wished size>
  

• still assuming that you know the size of a handler, copy their code in the IDT initialization to the location you wish them to lay.
• if you're using a powerful bootloader (not naming it) that fully supports ELF, put your handlers in an .alt_text section (or .handlers or whatever) and tell the linker where you want that section to be placed in virtual memory. -- this will likely fail if you use binary output, though (the best the linker could then do would be just to fill the gap with 0es in the file )

thanks for your responses, Tim, i am still unsure about your comment, why is it i dont need to care about where my interrupt handlers are located? dont i need to put a correct offset in the interrupt gate?


pype, heh yea i keep on thinking this isnt the way to be doing it, i am not trying to do anything special just setup interrupts normally

pype, your suggestion about setting interrupt handlers at the beginning of the kernel is a good one, i can put them in data so they are not execute i am assuming (will try this out in a few hours...) so that sounds like a good idea.

thanks for your time,
libber

You need to put a correct offset in the interrupt gate, but you don't need to know the exact numerical value. Just do this: (pseudocode) etc., where interrupt0, interrupt1, ... are the names of your interrupt handler routines. You don't need to put them in any specific place.

ah! perfect, i completly did not think of using labels and ignored the fact that labels resolve to addresses. *this* is the easy way everyone else kernel does it now i see. thanks

libber

ok, now i am going to impliment this and there are 2 parts to the offset section of an interrupt gate, how could i go about breaking the address in a label in half?

thanks for your time,
libber

the simplest is to put the isr addresses in an array of DWORDS and split them in lo/hi words at run-time (thus your IDT is built by early initialization of your kernel, rather than stored as data ...