suppose that the current task ( in user mode ) has been interrupted (for examble thru IRQ0 -Timer-),the Interrupt Handler has been declared as Interrupt Gate. when the handler call schudele() which then make the task switch thru far jmp, the cpu then will save all register in TSS of interrupted task. note that ds and cs ss now piont to kernel stack and code selector.
now suppose that we will switch now to that Task again, I think the cpu will generate #GP exception, because this Task has been declared as user level task and this task try to access memory for ring 0? is that right or it is wrong.
until now I have not test it, because I have not written user task yet. for that i need floppy disk driver - which until now not work ;D- and FS support.
Another Question in Task Switch?
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Re:Another Question in Task Switch?
what do you mean by "declared as a user-level task" ?
Do you mean the TSS.DPL = 3 ? i wouldn't do that if i were you: it would mean that any DPL3 code could jmp or call your task.
Once every TSS has DPL0, Nothing distinguish a user task from a kernel task from the processor point of view, except when resuming a user task, the stack will have user code, stack and data segment to return to user process operations.
Do you mean the TSS.DPL = 3 ? i wouldn't do that if i were you: it would mean that any DPL3 code could jmp or call your task.
Once every TSS has DPL0, Nothing distinguish a user task from a kernel task from the processor point of view, except when resuming a user task, the stack will have user code, stack and data segment to return to user process operations.
Re:Another Question in Task Switch?
aha, when TSS.DBL=0 that not mean that Task must work only on Code or Data segment of DPL=0. it mean only that only Program which run DPL=0 could switch to this TSS.
ok, when the CPU resume the TSS it will run the insteruction directly after "ljmp tss.tr" - in schedule for examle- and the it return from the schedule function make iret from the timer, which will restore all register which has bean saved in kernel stack, and resume execution the user process. is right?
I would like to know the details before implementing any user task, so I will know what I am doing.
ok, when the CPU resume the TSS it will run the insteruction directly after "ljmp tss.tr" - in schedule for examle- and the it return from the schedule function make iret from the timer, which will restore all register which has bean saved in kernel stack, and resume execution the user process. is right?
I would like to know the details before implementing any user task, so I will know what I am doing.
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Re:Another Question in Task Switch?
that's exactly it. From the scheduler point of view, switching from/to a user or kernel TSS will have no difference: everything will be performed by IRET when exitting the IRQ0 handler (or the SYSCALL handler if the task has requested the interruption by the invokation of some blocking system call).