enabling interrupts?

[beyondsociety]

What are the necessary steps in order to enable interrupts in protected mode?

[Pype.Clicker]

- have a valid IDT installed
- remap IRQ to some 'free' place (in real mode, they use 8..15 for IRQ0..7. in pmode, these slots are used by exceptions)
- light a candle and pray
- STI.

[distantvoices]

pray ... that is good ... and not only ONE Candle *sssfg*

and it is good to hide all axes and motor saws wide away just not to become the wish to do VERY un-nice things to the computer.

Ah ... and have some valid interrupt handlers installed in the idt. *gg*

[Pype.Clicker]

Off-topic Question: d'you know why so much software enterprises started in the basements ?

(esauceb esoht ohw dah rieht erawdrah ta eht dnoces roolf dah ssel secnahc ot evah ti gnikrow retfa yeht worht ti urht eht wodniw

[distantvoices]

Wisdom comes to those who read it backwards *sssfffggg*

quel merde que j'ai pas parle le francais il y a dix ans... I know this language has some NICE idioms for this kind of thoughts ];-[)

[beyondsociety]

Could we stay on topic here.

[Pype.Clicker]

Could we stay on topic here.

YEs, though it would be less funny

- have a valid IDT installed

Just get an array of N*8 bytes, with N>48 so that you're sure you can at least have an entry for every exception and IRQ.
Then, fill that array with Interrupt Trap Descriptors (<handler0..15><code-selector><type byte & reserved byte><handler16..31> iirc)

As a first try, your handler code could just be "<display some panic code>; hlt" for exceptions and "IRET" for interrupts.

- remap IRQ to some 'free' place (in real mode, they use 8..15 for IRQ0..7. in pmode, these slots are used by exceptions)

This will be done through the Programmable Interrupt Controller (intel 8259A).

Code: Select all

Set8259A:
;[PROC]============================================================
;==            Set 8255A interrupts vectors
;==     Input: Bl= interrupt vector for IRQ0
;==            Bh= interrupt vector for IRQ8
;==================================================================
        push eax
        push edx

        mov al,11h
        out 20h,al      ;ICW1:=__init__         ;master
        out 0A0h,al     ;ICW1:=__init__         ;slave
        call __wait
        mov al,bl
        out 21h,al      ;ICW2:=irq0slot
        mov al,bh
        out 0A1h,al     ;ICW2:=irq8slot
        call __wait
        mov al,4        ;bit 2 set => master recieves on irq 2 
        out 21h,al      ;ICW3:=IRQ2 (Attach)
        mov al,2        ;valeur=2 => slave sends to irq 2
        out 0A1h,al     ;ICW3:=IRQ2 (Attach)
        call __wait
        mov al,0xd
        out 21h,al      ;ICW4:=IntelEnvironnement
        mov al,9
        out 0A1h,al     ;ICW4:=IntelEnvironnement
        call __wait
        pop edx
        pop eax
        ret

__wait:
%ifdef __IN_WAIT__
        in al,21h       ;just a tiny delay to let the bus resting
        in al,0A1h      ;Should be enough on any architecture
%else
        push ecx
        mov ecx,4096
.here:  loop .here
        pop ecx
%endif
        ret

The "__IN_WAIT__" flag should be defined, while the "loop 4096" is not really a nice way to wait. That's just something i used in replacement to "jmp next; next:" that was used with 80386 processors but which doesn't wait anymore on jump-predictive AMD processors like AMD K6-II

- light a candle and pray

Get a match box or possibly a lighter and ... err .. waitaminute ...

- STI.

just re-enables the hardware interrupts. Maybe you'll wish to mask most of them until you actually have a valid driver installed, which you can also do with the "mask" feature of 8259A -- accessed through port 0x21 in normal operations mode.

I suggest you give your IDT a test with INT 0x20 before you actually enable the hardware interrupts: things will probably be easier to debug if you know what is called and when.