Do I need a TSS or LDT
Posted: Sun Nov 10, 2002 9:18 am
Hi
On a 32-bit pmode os with a flat memory model and paging, I understand that one method to handle the Segmentation of the x86 CPU is to have four 4GB (supervisor code, supervisor data, user code and user data) Segments, a GDT of course and an IDT, not forgetting call gates for API calls etc.
What I'm not sure about is what to do with the Task Register (do I create any TSS's?) or the LDTR (I don't want an LDT). Do I simply set these to 0?
Plus where do I asign the stack (to the data segements possibly?).
Thanks
On a 32-bit pmode os with a flat memory model and paging, I understand that one method to handle the Segmentation of the x86 CPU is to have four 4GB (supervisor code, supervisor data, user code and user data) Segments, a GDT of course and an IDT, not forgetting call gates for API calls etc.
What I'm not sure about is what to do with the Task Register (do I create any TSS's?) or the LDTR (I don't want an LDT). Do I simply set these to 0?
Plus where do I asign the stack (to the data segements possibly?).
Thanks
