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Dear Forum,

I am a bit confused about Gate types and using the IST fields of the TSS. If I understand correctly, I need it for switching from ring 3 to ring 0 in case of an IRQ (for system calls I will use syscall only).

If my IRQ gets called while in DPL3, it loads the stack from the IST0 field. But when another IRQ with higher priority triggers, it reloads IST0 and therefore overrides the stack???
Edit: I got it now: As it is already in DPL0, it doesn't load the IST0. That was my fault.

But I am still confused when to use which gate type in the IDT. Which interrupts should be reentrant? Well, exceptions can occur anytime, because only IRQs are dependent on the IF-flag, right?

Best regards
Sebi

sebihepp wrote: ↑Tue Jun 03, 2025 12:12 pm But I am still confused when to use which gate type in the IDT.

Interrupt gates. Always interrupt gates. There are only two gate types sensible to use in 64-bit mode, namely trap gates and interrupt gates, and the only difference is whether they hard disable the interrupt flag. Interrupt gates disable the interrupt flag, trap gates leave it at its current setting.

But even if you plan on making a reentrant kernel, the first-level interrupt handler should always run without the interrupt flag, to produce a consistent kernel state (e.g. load the kernel GS) before possibly re-enabling it, if enough stack space to do so remains.

BTW, the thing you were worried about prior to the edit actually does happen with the IST. If an IST interrupt is triggered twice, the situation is generally not recoverable. Thankfully, you should reserve IST only for NMIs, machine check exceptions, and double faults, and in most of those cases, you just want to panic anyway.

Thank you very much. I confused ISTn with RSPn from 32bit IDT.

Also thanks for the info, that ISRs are nearly impossible to be made reentrable.

I think ISRs can run partly with interrupts enabled, but just as pointed out, they should start with interrupts disabled, so interrupt gates should always be used for IRQs.