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PIT fires once on first boot, but doesn't re-call IRQ.

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PIT fires once on first boot, but doesn't re-call IRQ.

Posted: Wed Jul 24, 2024 12:39 pm
by renzei
Hi there!

I've been following a mixture of the Meaty Skeleton template (https://wiki.osdev.org/Meaty_Skeleton) and this YouTube series (https://www.youtube.com/playlist?list=P ... q_wRpYvQQy), and have gotten to the point of trying to set up the PIT.

The code with which I initialize the timer is below, and I have verified through GDB that the proper ASM is being executed, in that the correct bytes I provided are sent to the ports provided. This also is obvious since the PIT does call the IRQ once, resulting in text being printed to the screen, but it doesn't fire off again.

This isn't an issue with my printf function or anything, as I've made sure that it can print multiple lines/times, and ISR/IRQs are handled properly, which I've verified by attempting to divide by zero (although I did encounter a weird outcome, wherein a different ISR than expected was called - [isr6] invalid opcode rather than [isr0] div by zero, which maybe is related??).

Here's a direct zip archive of the source code if needs be :D
os.zip
(19.67 KiB) Downloaded 119 times
Anyway, any advice would be super helpful - thanks in advance!

Screenshot of the output in QEMU (qemu-system-i386 -cdrom os.iso) [made with grub-mkrescue].
2024-07-24_19-39.png
kernel/kernel/kernel.c:

Code: Select all

#include <stdio.h>

#include <kernel/tty.h>
#include <kernel/gdt.h>
#include <kernel/idt.h>
#include <kernel/timer.h>

void kernel_main(void) {
  tty_init();
  gdt_init();
  printf("Initialised GDT.\n");
  idt_init();
  printf("Initialised IDT.\n");
  timer_init();
}
kernel/arch/i386/timer.c:

Code: Select all

#include <kernel/timer.h>
#include <kernel/idt.h>
#include <kernel/port_io.h>

#include <stdio.h>

uint64_t ticks;
const uint16_t freq = 100;

void timer_init() {
  ticks = 0;
  irq_install_handler(0, &on_irq0);

  // 1.1931816666 MHz
  uint16_t divisor = (uint16_t)(1193182/freq);

  // 00110110
  // - 16-bit binary
  // - square wave
  // - lobyte/hibyte access
  // - channel 0 -> irq 0
  outb(0x43, 0x36);
  outb(0x40, divisor & 0xFF);
  outb(0x40, (divisor >> 8) & 0xFF);
}

void on_irq0(struct interrupt_registers *regs) {
  ticks += 1;
  printf("Timer ticked!\n");
}
kernel/include/kernel/timer.h:

Code: Select all

#ifndef _KERNEL_TIMER_H_
#define _KERNEL_TIMER_H_

#include "idt.h"

void timer_init();
void on_irq0(struct interrupt_registers *regs);

#endif
kernel/arch/i386/port_io.c:

Code: Select all

#include <kernel/port_io.h>

void outb(uint16_t port, uint8_t val) {
  asm volatile ("outb %1, %0" : : "dN" (port), "a" (val));
}
kernel/arch/i386/idt.c:

Code: Select all

#include <kernel/idt.h>
#include <kernel/tty.h>
#include <kernel/port_io.h>

#include <string.h>

struct idt_entry_t idt_entries[256];
struct idt_ptr_t idt_ptr;

extern void idt_flush(uint32_t);

void idt_init(void) {
  idt_ptr.limit = sizeof(struct idt_entry_t) * 256 - 1;
  idt_ptr.base = (uint32_t) &idt_entries;

  memset(&idt_entries, 0, sizeof(idt_entries[0]) * 256);

  // PIC stuff :>
  // 0x20 command, 0x21 data
  // 0xA0 command, 0xA1 data

  outb(0x20, 0x11);
  outb(0xA0, 0x11);

  outb(0x21, 0x20);
  outb(0xA1, 0x28);

  outb(0x21, 0x04);
  outb(0xA1, 0x02);

  outb(0x21, 0x01);
  outb(0xA1, 0x01);

  outb(0x21, 0x00);
  outb(0xA1, 0x00);

  idt_set_gate(0, (uint32_t)isr0, 0x08, 0x8E);
  idt_set_gate(1, (uint32_t)isr1, 0x08, 0x8E);
  idt_set_gate(2, (uint32_t)isr2, 0x08, 0x8E);
  idt_set_gate(3, (uint32_t)isr3, 0x08, 0x8E);
  idt_set_gate(4, (uint32_t)isr4, 0x08, 0x8E);
  idt_set_gate(5, (uint32_t)isr5, 0x08, 0x8E);
  idt_set_gate(6, (uint32_t)isr6, 0x08, 0x8E);
  idt_set_gate(7, (uint32_t)isr7, 0x08, 0x8E);
  idt_set_gate(8, (uint32_t)isr8, 0x08, 0x8E);
  idt_set_gate(9, (uint32_t)isr9, 0x08, 0x8E);
  idt_set_gate(10, (uint32_t)isr10, 0x08, 0x8E);
  idt_set_gate(11, (uint32_t)isr11, 0x08, 0x8E);
  idt_set_gate(12, (uint32_t)isr12, 0x08, 0x8E);
  idt_set_gate(13, (uint32_t)isr13, 0x08, 0x8E);
  idt_set_gate(14, (uint32_t)isr14, 0x08, 0x8E);
  idt_set_gate(15, (uint32_t)isr15, 0x08, 0x8E);
  idt_set_gate(16, (uint32_t)isr16, 0x08, 0x8E);
  idt_set_gate(17, (uint32_t)isr17, 0x08, 0x8E);
  idt_set_gate(18, (uint32_t)isr18, 0x08, 0x8E);
  idt_set_gate(19, (uint32_t)isr19, 0x08, 0x8E);
  idt_set_gate(20, (uint32_t)isr20, 0x08, 0x8E);
  idt_set_gate(21, (uint32_t)isr21, 0x08, 0x8E);
  idt_set_gate(22, (uint32_t)isr22, 0x08, 0x8E);
  idt_set_gate(23, (uint32_t)isr23, 0x08, 0x8E);
  idt_set_gate(24, (uint32_t)isr24, 0x08, 0x8E);
  idt_set_gate(25, (uint32_t)isr25, 0x08, 0x8E);
  idt_set_gate(26, (uint32_t)isr26, 0x08, 0x8E);
  idt_set_gate(27, (uint32_t)isr27, 0x08, 0x8E);
  idt_set_gate(28, (uint32_t)isr28, 0x08, 0x8E);
  idt_set_gate(29, (uint32_t)isr29, 0x08, 0x8E);
  idt_set_gate(30, (uint32_t)isr30, 0x08, 0x8E);
  idt_set_gate(31, (uint32_t)isr31, 0x08, 0x8E);

  idt_set_gate(32, (uint32_t)irq0, 0x08, 0x8E);
  idt_set_gate(33, (uint32_t)irq1, 0x08, 0x8E);
  idt_set_gate(34, (uint32_t)irq2, 0x08, 0x8E);
  idt_set_gate(35, (uint32_t)irq3, 0x08, 0x8E);
  idt_set_gate(36, (uint32_t)irq4, 0x08, 0x8E);
  idt_set_gate(37, (uint32_t)irq5, 0x08, 0x8E);
  idt_set_gate(38, (uint32_t)irq6, 0x08, 0x8E);
  idt_set_gate(39, (uint32_t)irq7, 0x08, 0x8E);
  idt_set_gate(40, (uint32_t)irq8, 0x08, 0x8E);
  idt_set_gate(41, (uint32_t)irq9, 0x08, 0x8E);
  idt_set_gate(42, (uint32_t)irq10, 0x08, 0x8E);
  idt_set_gate(43, (uint32_t)irq11, 0x08, 0x8E);
  idt_set_gate(44, (uint32_t)irq12, 0x08, 0x8E);
  idt_set_gate(45, (uint32_t)irq13, 0x08, 0x8E);
  idt_set_gate(46, (uint32_t)irq14, 0x08, 0x8E);
  idt_set_gate(47, (uint32_t)irq15, 0x08, 0x8E);

  idt_set_gate(128, (uint32_t)isr128, 0x08, 0x8E);
  idt_set_gate(177, (uint32_t)isr177, 0x08, 0x8E);

  idt_flush((uint32_t) &idt_ptr);
}

void idt_set_gate(uint8_t num, uint32_t base, uint16_t sel, uint8_t flags) {
  idt_entries[num].base_low = base & 0xFFFF;
  idt_entries[num].base_high = (base >> 16) & 0xFFFF;

  idt_entries[num].sel = sel;
  idt_entries[num].always_zero = 0;
  idt_entries[num].flags = flags | 0x60;
}

const char *exception_messages[] = {
  "Division by Zero",
  "Debug",
  "Non Maskable Interrupt",
  "Breakpoint",
  "Into Detected Overflow",
  "Out of Bounds",
  "Invalid Opcode",
  "No Coprocessor",
  "Double Fault",
  "Coprocessor Segment Overrun",
  "Bad TSS",
  "Segment not present",
  "Stack fault",
  "General protection fault",
  "Page fault",
  "Unknown Interrupt",
  "Coprocessor fault",
  "Alignment fault",
  "Machine Check",
  "Reserved",
  "Reserved",
  "Reserved",
  "Reserved",
  "Reserved",
  "Reserved",
  "Reserved",
  "Reserved",
  "Reserved",
  "Reserved",
  "Reserved",
  "Reserved",
  "Reserved"
};

void isr_handler(struct interrupt_registers *regs) {
  if (regs->interrupt_no < 32) {
    tty_puts(exception_messages[regs->interrupt_no]);
    tty_putc('\n');
    tty_puts("Exception - halt.");
    while (1);
  }
}

void *irq_routines[16] = {
  0, 0, 0, 0, 0, 0, 0, 0,
  0, 0, 0, 0, 0, 0, 0, 0
};

void irq_install_handler(int irq, void (*handler)(struct interrupt_registers *r)) {
  irq_routines[irq] = handler;
}

void irq_uninstall_handler(int irq) {
  irq_routines[irq] = 0;
}

void irq_handler(struct interrupt_registers *regs) {
  void (*handler)(struct interrupt_registers *r);

  handler = irq_routines[regs->interrupt_no - 32];

  if (handler)
    handler(regs);

  if (regs->interrupt_no >= 40) {
    outb(0xA0, 0x20);
  }

  outb(0x20, 0x20);
}
(yes - this should be idtS, not idt, as this makes sure the idt.c and idts.asm object files are differently named.)
kernel/arch/i386/idts.asm:

Code: Select all

global idt_flush
idt_flush:
    mov eax, [esp+4]
    lidt [eax]
    sti
    ret

%macro ISR_NOERRCODE 1
    global isr%1
    isr%1:
        cli
        push long 0
        push long %1
        jmp isr_common_stub
%endmacro

%macro ISR_ERRCODE 1
    global isr%1
    isr%1:
        cli
        push long %1
        jmp isr_common_stub
%endmacro

%macro IRQ 2
    global irq%1
    irq%1:
        cli
        push long 0
        push long %2
        jmp irq_common_stub
%endmacro

ISR_NOERRCODE 0
ISR_NOERRCODE 1
ISR_NOERRCODE 2
ISR_NOERRCODE 3
ISR_NOERRCODE 4
ISR_NOERRCODE 5
ISR_NOERRCODE 6
ISR_NOERRCODE 7
ISR_ERRCODE 8
ISR_NOERRCODE 9
ISR_ERRCODE 10
ISR_ERRCODE 11
ISR_ERRCODE 12
ISR_ERRCODE 13
ISR_ERRCODE 14
ISR_NOERRCODE 15
ISR_NOERRCODE 16
ISR_NOERRCODE 17
ISR_NOERRCODE 18
ISR_NOERRCODE 19
ISR_NOERRCODE 20
ISR_NOERRCODE 21
ISR_NOERRCODE 22
ISR_NOERRCODE 23
ISR_NOERRCODE 24
ISR_NOERRCODE 25
ISR_NOERRCODE 26
ISR_NOERRCODE 27
ISR_NOERRCODE 28
ISR_NOERRCODE 29
ISR_NOERRCODE 30
ISR_NOERRCODE 31

ISR_NOERRCODE 128
ISR_NOERRCODE 177

IRQ 0, 32
IRQ 1, 33
IRQ 2, 34
IRQ 3, 35
IRQ 4, 36
IRQ 5, 37
IRQ 6, 38
IRQ 7, 39
IRQ 8, 40
IRQ 9, 41
IRQ 10, 42
IRQ 11, 43
IRQ 12, 44
IRQ 13, 45
IRQ 14, 46
IRQ 15, 47

extern isr_handler
isr_common_stub:
    pusha
    mov eax, ds
    push eax
    mov eax, cr2
    push eax

    mov ax, 0x10
    mov ds, ax
    mov es, ax
    mov fs, ax
    mov gs, ax

    push esp
    call isr_handler

    add esp, 8
    pop ebx
    mov ds, bx
    mov es, bx
    mov fs, bx
    mov gs, bx

    popa
    add esp, 8
    sti
    iret

extern irq_handler
irq_common_stub:
    pusha
    mov eax, ds
    push eax
    mov eax, cr2
    push eax

    mov ax, 0x10
    mov ds, ax
    mov es, ax
    mov fs, ax
    mov gs, ax

    push esp
    call irq_handler

    add esp, 8
    pop ebx
    mov ds, bx
    mov es, bx
    mov fs, bx
    mov gs, bx

    popa
    add esp, 8
    sti
    iret

Re: PIT fires once on first boot, but doesn't re-call IRQ.

Posted: Wed Jul 24, 2024 10:02 pm
by Octocontrabass
renzei wrote: ↑Wed Jul 24, 2024 12:39 pmYouTube series
Careful. Tutorials like this are usually full of bugs because they're written by beginners. Videos are worse than other formats because it's harder for the author to go back and correct their mistakes!
renzei wrote: ↑Wed Jul 24, 2024 12:39 pm(although I did encounter a weird outcome, wherein a different ISR than expected was called - [isr6] invalid opcode rather than [isr0] div by zero, which maybe is related??)
In C, division by zero is undefined behavior. Undefined behavior means the compiler can generate code that does anything. Your compiler has chosen to generate code that tries to execute an invalid opcode.

If you want to see a divide error, try this instead:

Code: Select all

asm volatile( "div %ah" );
renzei wrote: ↑Wed Jul 24, 2024 12:39 pmkernel/kernel/kernel.c:

Code: Select all

void kernel_main(void) {
  ...
  timer_init();
}
You initialize the timer and then return from kernel_main. What happens after you return from kernel_main?

Re: PIT fires once on first boot, but doesn't re-call IRQ.

Posted: Thu Jul 25, 2024 12:24 am
by renzei
Ah I suppose div by 0 is undefined in C, yeah - good point :p

After kernel_main returns, I go to a cli, hlt, jmp loop, which as I'm writing this I'm realising is what is messing everything up, most likely because of the cli. :<

I added a while (1); to the end of kernel_main and the timer works perfectly.

And using asm volatile does give isr0 div by zero, so that's not an issue either.

Thanks so much for your help!

Re: PIT fires once on first boot, but doesn't re-call IRQ.

Posted: Thu Jul 25, 2024 1:19 am
by iProgramInCpp
renzei wrote: ↑Thu Jul 25, 2024 12:24 am I added a while (1); to the end of kernel_main and the timer works perfectly.
Careful again! while(1) ; is actually undefined behavior, so to ensure that that while loop will work everywhere, add an empty asm volatile block inside. As in:

Code: Select all

while (true)
	asm volatile("");

Re: PIT fires once on first boot, but doesn't re-call IRQ.

Posted: Thu Jul 25, 2024 8:32 am
by nullplan
iProgramInCpp wrote: ↑Thu Jul 25, 2024 1:19 am while(1) ; is actually undefined behavior,
Citation needed. But

Code: Select all

while (1) asm("hlt");
may not burn up your CPU.

Re: PIT fires once on first boot, but doesn't re-call IRQ.

Posted: Sat Jul 27, 2024 12:58 pm
by iProgramInCpp
nullplan wrote: ↑Thu Jul 25, 2024 8:32 am Citation needed. But

Code: Select all

while (1) asm("hlt");
may not burn up your CPU.
Correct.
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