Why subtract the starting bus address here? From my reading of the PCI firmware specification, the starting bus address is where you must start enumerating relative to the ECAM base. Whatever PCI device bdfs you successfully enumerate from there, you would just use those bus numbers directly relative to the base. They would be greater than the starting bus address anyway.To access a specific register within a device's PCI configuration space, you have to use the device's PCI Segment Group and bus to determine which memory mapped PCI configuration space area to use, and obtain the starting physical address and starting bus number for that memory mapped area. Once you have the correct starting physical address and starting bus number for that memory mapped area you would use the following formula to determine where the (4096-byte) area for a function's PCI configuration space is: Physical_Address = MMIO_Starting_Physical_Address + ((Bus - MMIO_Starting_Bus) << 20 | Device << 15 | Function << 12).
ECAM access formula in PCI Express page is wrong
ECAM access formula in PCI Express page is wrong
From the PCI_Express wiki:
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Re: ECAM access formula in PCI Express page is wrong
I'm not sure if that's outright wrong or just poor wording. The address given in the MCFG table represents where bus 0 would be mapped if bus 0 is mapped, which means the actual base address of the MMIO might be a higher address if bus 0 is not mapped. If you calculate the real MMIO base address according to the lowest mapped bus, then you would need to subtract the starting bus to get back to the address given by the MCFG table.
In practice, bus 0 is always mapped.
You should be able to log in to the wiki, so feel free to correct that page as you see fit.
In practice, bus 0 is always mapped.
You should be able to log in to the wiki, so feel free to correct that page as you see fit.
Re: ECAM access formula in PCI Express page is wrong
You're right, the subtraction would be required if someone were using a base address relative to the lowest mapped bus. However, the address in the MCFG table is always relative to bus zero, as I quote from the PCI firmware spec:
So someone would have to modify the address they read from MCFG to end up in this situation. I'll add this context to the wiki. Thanks.For PCI-X and PCI Express platforms utilizing the enhanced
configuration access method, the base address of the memory mapped configuration space
always corresponds to bus number 0 (regardless of the start bus number decoded by the host
bridge) and further must comply with alignment requirements of the corresponding local bus
specification.