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fn free_mtrr_pair() -> Option<(usize, usize)> {
    let mttr_pair_reg_nb = mtrr_pair_reg_nb();
    let mut mttr_pair_reg = None;
    for i in 0..mttr_pair_reg_nb {
        let mask_reg = 0x201 + i * 2;
        let valid_bit = unsafe { readmsr(mask_reg, 11..=11) };
        if valid_bit == 0 {
            mttr_pair_reg = Some((mask_reg - 1, mask_reg));
            break;
        }
    }
    mttr_pair_reg
}

pub fn set_mtrr_wc(addr: usize, size: usize) -> Result<(), MsrError> {
    if !has_msr_support() {
        return Err(MsrError::NoMsrSupport);
    }
    if !has_wc_type_support() {
        return Err(MsrError::NoWCTypeSupport);
    }

    enable_mtrr(); // It's already enabled by default but well

    // Use the MTTR pair to set the WC memory type to the given address range
    let (base_reg, mask_reg) = free_mtrr_pair().ok_or(MsrError::NoFreeMtrPair)?;
    // size must be aligned to a boundary of a power of two and not be bigger than 52 bits
    let mask = !(size.next_power_of_two() - 1) & ((1 << 52) - 1);

    x86_64::instructions::interrupts::without_interrupts(move || unsafe {
        writemsr(base_reg, 12..=51, addr >> 12).unwrap(); // Set the base address
        writemsr(base_reg, 0..=7, WC_MEMORY_TYPE).unwrap(); // Set the memory type (WC_MEMORY_TYPE = 1)
        writemsr(mask_reg, 12..=51, mask >> 12).unwrap(); // Set the mask                   // <-- THIS IS THE LINE CAUSING THE GPF
        writemsr(mask_reg, 11..=11, 1).unwrap(); // Set the valid bit
    });

    Ok(())
}

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        writemsr(mask_reg, 12..=51, mask >> 12).unwrap(); // Set the mask                   // <-- THIS IS THE LINE CAUSING THE GPF

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cat /proc/cpuinfo | grep "address"  

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address sizes	: 43 bits physical, 48 bits virtual